Converged Industrial Control Architecture With Embedded Switching
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Solution Overview
Problem
Current technologies face challenges in providing a converged architecture for industrial control and real-time applications that efficiently manage deterministic communication and resource allocation across multiple entities in fog computing environments, leading to inefficiencies in processing and timing predictability.
Innovation Solution
The proposed architecture incorporates a physical network port, a switching module with embedded CPU cores, a network interface controller, and a multi-core computing module, enabling deterministic Ethernet support, time-aware scheduling, and hierarchical resource allocation to ensure precise timing and efficient communication across fog nodes, leveraging IEEE TSN and virtualization for real-time and non-real-time applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a converged architecture for industrial control and real-time applications is implemented, then resource allocation efficiency and timing predictability are improved, but system complexity increases due to multiple embedded CPU cores and virtualization requirements
Solution Approach 1:
The system is segmented into multiple embedded CPU cores (e.g., ARM cores) within the switching module, each capable of independent operation and virtualization. This segmentation allows parallel processing of control and real-time applications, improving resource allocation efficiency while managing complexity through modular design
Solution Approach 2:
The switching module is designed with multi-functionality, serving both as a network switch and as a computing platform with embedded CPU cores. This universal design consolidates multiple functions into a single module, improving resource utilization while the standardized interface helps manage system complexity
2Manufacturing precision
If deterministic Ethernet communication is implemented with time-aware scheduling, then timing predictability is improved, but processing overhead increases due to multiple scheduling layers
Solution Approach 1:
Time-aware scheduling is configured in advance with predefined time slots and priorities for different traffic types. The hypervisor and operating systems pre-allocate CPU time slices to virtual machines and applications, ensuring deterministic timing without requiring complex real-time decisions during message processing
Solution Approach 2:
The scheduling mechanism ensures continuous processing of time-critical messages without interruption or reprocessing. Once a message is scheduled for a specific time slot, the system maintains continuous action to process it without delays, eliminating redundant processing overhead while preserving timing precision
3Productivity
If multiple virtual machines and containers are deployed on fog nodes, then resource utilization is improved, but resource contention increases affecting real-time performance
Solution Approach 1:
Different quality levels of service are assigned to different virtual machines and containers based on their real-time requirements. Critical real-time applications receive guaranteed CPU time slices and priority scheduling, while non-critical applications use remaining resources, allowing high resource utilization without compromising real-time performance
Solution Approach 2:
The system dynamically adjusts scheduling parameters such as CPU time slice duration, priority levels, and context switch frequencies based on real-time workload conditions. This parameter adaptation allows the system to maintain high resource utilization while preventing resource contention from degrading real-time performance
Data Source
AI summary
Provided herein are exemplary systems and methods for an architecture for converged industrial control and real time applications, the architecture comprising a physical network port, a switching module, an embedded ARM core, a network interface controller, and a multi-core computing module. According to further exemplary embodiments, the physical network port is an ethernet port capable of supporting a real-time field bus. The switching module may be configured to support a multiport ethernet switch. The switching module may also be configured to enable a backplane mesh to interconnect multiple foglets. Additionally, the embedded ARM core may be within the switching module, and the embedded ARM core may be configured to support virtualization.