Convergence Memory Controller Row Hammer Mitigation

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Solution Overview

Problem

In large-scale data centers, existing memory devices are vulnerable to memory attacks like 'row hammer' that can lead to data distortion due to continuous access, posing a risk of data insecurity, especially in systems with volatile memories like DRAM.

Innovation Solution

A convergence memory device with a controller that detects repeated access requests within a refresh cycle and postpones processing of such requests until the end of the cycle, thereby preventing data distortion in adjacent victim storage regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If continuous access requests are processed immediately, then productivity is improved, but data integrity deteriorates due to memory attacks like row hammer

Engineering Contradiction:
Improveaccess request processing speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller performs preliminary detection of access request patterns within the refresh cycle before processing. By identifying repeated access requests to the same storage region in advance, the controller can prevent memory attacks before they cause data distortion, thus maintaining data integrity while still processing legitimate requests efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller acts as an intermediary between access requests and the memory array. It intercepts access requests, analyzes their patterns, and selectively delays or processes them. This intermediary function allows the system to filter out malicious row hammer attacks while permitting normal access operations to proceed, resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If access requests are delayed to prevent memory attacks, then data integrity is improved, but productivity deteriorates due to processing delays

Engineering Contradiction:
Improvedata integrityVSAvoidaccess request processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The controller applies selective delay only to specific access requests that exhibit malicious patterns (repeated accesses to the same storage region within a refresh cycle). Legitimate access requests are processed immediately without delay. This localized application of the delay mechanism ensures data integrity for vulnerable regions while maintaining overall system productivity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The controller monitors access request parameters such as the number of requests, target storage region, and timing within the refresh cycle. By changing the processing state based on these parameters (immediate processing vs. delayed processing), the system dynamically adapts to prevent attacks while maintaining efficiency for normal operations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If refresh operations are performed frequently, then data integrity is improved, but energy consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The controller extracts and identifies only the specific storage regions that are under attack by detecting repeated access patterns. Instead of performing refresh operations on the entire memory array, the controller targets only the vulnerable regions that require protection. This selective approach maintains data integrity for attacked regions while minimizing unnecessary refresh operations and reducing overall energy consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10795613B2Convergence memory device and operation method thereof
Publication Date: 2020.10.06 SK HYNIX INC
  • US10795613B2 patent drawing
  • US10795613B2 patent drawing
  • US10795613B2 patent drawing

AI summary

A convergence memory device includes a plurality of memories and a controller configured to control the plurality of memories. When an access request for accessing a storage region included in one or more of the memories is received, the controller determines whether the access request has been received a preset number of times or more within a refresh cycle. When the controller determines that the access request has been received the preset number of times or more, the controller postpones processing of the received access request.