Switching Converter Clock Generator On-Time Regulation
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Solution Overview
Problem
In switching converters, the inherent delay in control circuits leads to a minimum on-time for the main transistor, causing a decrease in on-time as input voltage increases, resulting in output voltage ripple.
Innovation Solution
A time threshold is set, and the frequency of the clock signal is adjusted to regulate the on-time of the main transistor to this threshold, preventing it from falling to the minimum on-time and thus eliminating voltage ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the input voltage of the switching converter increases, then the conversion efficiency improves, but the on-time of the main transistor decreases to reach the minimum on-time, causing output voltage ripple
Solution Approach 1:
The patent implements dynamic adjustment of the clock signal frequency based on the detected on-time of the main transistor. When the on-time approaches the minimum threshold, the system dynamically changes the operating mode from constant frequency to variable frequency, thereby preventing the on-time from falling below the minimum value and eliminating voltage ripple while maintaining high conversion efficiency.
Solution Approach 2:
The patent employs a feedback mechanism where the control circuit detects the actual on-time of the main transistor and compares it with the minimum threshold value. Based on this feedback information, the system adjusts the clock signal frequency to ensure the on-time remains above the threshold, thus stabilizing the output voltage while allowing efficient power conversion.
2Speed
If the clock signal frequency is increased to improve response speed, then the switching speed improves, but the on-time decreases and may reach the minimum on-time, causing voltage ripple
Solution Approach 1:
The system dynamically adjusts the clock signal frequency based on real-time detection of the main transistor's on-time. When the on-time is sufficient, the system operates at higher frequency for fast response. When the on-time approaches the minimum threshold, the frequency is reduced to maintain adequate on-time, thus preventing voltage ripple while preserving switching speed benefits.
Solution Approach 2:
The patent changes the clock signal frequency parameter dynamically based on the operating conditions. By adjusting this critical parameter, the system optimizes the balance between switching speed and on-time duration, ensuring that voltage ripple is prevented while maintaining efficient and responsive power conversion.
3Loss of time
If the minimum on-time is reduced to improve responsiveness, then the response time improves, but the output voltage ripple increases
Solution Approach 1:
Rather than using a fixed minimum on-time, the system dynamically determines the minimum on-time threshold based on real-time detection of actual on-time conditions. This dynamic approach allows the system to maintain sufficiently long on-times to prevent voltage ripple while minimizing the time loss, thereby optimizing responsiveness without generating harmful voltage ripple.
Solution Approach 2:
The control circuit continuously monitors the actual on-time of the main transistor and uses this feedback to adjust the clock signal frequency. This feedback mechanism ensures that the on-time never falls below the threshold that would cause voltage ripple, while keeping the on-time as short as possible to minimize response time loss, thus eliminating voltage ripple without excessive time penalty.
Data Source
AI summary
A control method of a switching converter, wherein the switching converter has a main transistor and is configured to provide an output signal. The control method includes: generating a feedback signal indicative of the output signal of the switching converter; generating a clock signal to determine the switching frequency of the main transistor; generating a control signal to control the main transistor based on the clock signal and the feedback signal; and detecting whether the on-time of the main transistor is smaller than a time threshold based on the control signal. If the on-time of the main transistor is smaller than the time threshold, the frequency of the clock signal will be adjusted to regulate the on-time of the main transistor to be equal to the time threshold.