Converter Control Circuit With Fixed-Frequency Peak Current Emulation

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Solution Overview

Problem

Existing control circuits for electronic converters, such as buck, boost, and flyback converters, face challenges including large silicon area usage, high bias current, increased cost and package size due to error amplifiers, and audible noise from varying switching frequencies, particularly at light loads.

Innovation Solution

A control circuit that emulates Peak Current Mode (PCM) operation in an ON-OFF architecture without using an error amplifier, utilizing a PWM signal generator, comparators, and a charge/discharge circuit to regulate switching cycles based on feedback signals and a clock signal, thereby reducing silicon area and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an error amplifier is used in the control circuit, then the output voltage regulation is improved, but the silicon area and cost increase

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidsilicon area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent removes the error amplifier from the control circuit topology, extracting this component that causes silicon area increase while maintaining voltage regulation through an alternative mechanism using a reference voltage generator and direct comparison approach

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a reference voltage generator to create a reference signal that copies the desired output voltage characteristics, allowing comparison with the feedback signal without requiring a physical error amplifier, thus achieving regulation with reduced component count

Inventive Principle:
Principle #26Copying

2Measurement precision

If an error amplifier is used in the control circuit, then the output voltage regulation is improved, but the bias current increases

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidbias current
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The error amplifier is removed from the circuit, eliminating its bias current consumption while maintaining voltage regulation functionality through the reference voltage generator and direct feedback comparison mechanism

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If the switching frequency varies at light loads, then the converter adapts to load conditions, but audible noise is generated

Engineering Contradiction:
Improveload adaptationVSAvoidaudible noise
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs feedback control where the feedback signal from the output is compared with a reference voltage, and the comparison result controls the switching duty cycle. This feedback mechanism maintains stable switching frequency across different load conditions by adjusting the duty cycle rather than frequency, preventing audible noise while adapting to load changes

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12500508B2Control circuit for an electronic converter, related integrated circuit, electronic converter and method
Publication Date: 2025.12.16 STMICROELECTRONICS SRL
  • US12500508B2 patent drawing
  • US12500508B2 patent drawing
  • US12500508B2 patent drawing

AI summary

A control circuit for a switching stage of an electronic converter a driver circuit configured to generate one or more drive signals as a function of a Pulse-Width Modulation (PWM) signal and a PWM signal generator circuit configured to generate the PWM signal. A first comparator asserts a comparison signal when a feedback signal having a voltage being indicative of a current flowing through an inductance of the switching stage is greater than a reference signal. In response to a clock signal, a storage element asserts the PWM signal, whereby the clock signal indicates the duration of the switching period of the PWM signal. Conversely, in response to determining that the comparison signal is asserted, the storage element de-asserts the PWM signal.