Switching Converter Dead-Time Control Using Overlap Detection
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Solution Overview
Problem
Existing switching converters face inefficiencies due to long dead-times and potential shoot-through currents resulting from unpredictable propagation delays in high-side and low-side switch transitions, leading to power dissipation and device damage.
Innovation Solution
A control loop system with an overlap detector and dynamic dead-time adjustment mechanism to optimize the falling dead-time by detecting switch overlaps and adjusting the gate drive signals to minimize inefficiencies and prevent shoot-through.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed dead-time is used between high-side and low-side switch transitions, then device complexity is reduced, but power dissipation increases and efficiency deteriorates due to long dead-times and potential shoot-through currents
Solution Approach 1:
The patent implements dynamic dead-time adjustment by using a control loop that continuously monitors switch states and adjusts the dead-time interval between high-side and low-side switch transitions. The dead-time optimization block modifies the gate drive signal timing based on real-time detection of switch node voltage levels, transforming the static fixed dead-time into a dynamic adaptive parameter that optimizes efficiency while preventing shoot-through currents.
Solution Approach 2:
The patent employs feedback mechanisms where the dead-time optimization block receives feedback from the switch node voltage detection and adjusts the dead-time accordingly. The control loop uses the detected overlap conditions and switch states to dynamically modify the gate drive timing, creating a closed-loop system that continuously optimizes the dead-time interval to minimize power dissipation while maintaining safe operation.
2Loss of energy
If dead-time is reduced to minimize power dissipation, then efficiency is improved, but the risk of shoot-through current between power source and ground increases
Solution Approach 1:
The patent implements a self-adjusting mechanism where the dead-time optimization block automatically detects switch overlap conditions and self-corrects the dead-time interval without external intervention. The system monitors its own switch states through the switch node voltage detection and autonomously adjusts the gate drive timing to prevent shoot-through currents, enabling the converter to self-optimize its performance while maintaining safety.
Solution Approach 2:
The patent applies preliminary anti-action by detecting potential shoot-through conditions before they occur and preemptively adjusting the dead-time to prevent them. The overlap detector monitors the switch node voltage and gate drive signals to identify impending overlap situations, and the control loop提前 (in advance) modifies the dead-time interval to prevent shoot-through currents from occurring in the first place.
3Loss of energy
If dynamic dead-time adjustment is implemented to optimize efficiency, then power dissipation is reduced, but device complexity increases due to additional control circuitry
Solution Approach 1:
The patent achieves multi-functionality by designing the dead-time optimization block to perform multiple functions: detecting switch node voltage levels, determining switch overlap conditions, generating adjusted gate drive signals, and controlling dead-time intervals. This single integrated block consolidates what could be multiple separate circuits, reducing overall device complexity while still achieving dynamic dead-time adjustment and shoot-through prevention.
Solution Approach 2:
The patent merges the dead-time control function with the existing gate drive circuitry and switch node monitoring functions. The dead-time optimization block is integrated into the existing control architecture, combining multiple functions (voltage detection, overlap determination, signal generation) into a unified control mechanism that reduces the need for separate dedicated circuits for each function.
Data Source
AI summary
A switching converter includes high-side switch, a low-side switch, a first transistor, a second transistor, and a pull-up element. A series arrangement of the first transistor and the second transistor is coupled between a first terminal of the pull-up element and a first constant reference potential. A second terminal of the pull-up element is coupled to a second constant reference potential. A control terminal of the first transistor is coupled to a junction of the high-side switch and the low-side switch. A control terminal of the second transistor is coupled to the control terminal of the low-side switch. A voltage at a junction of the pull-up element and the series arrangement represents a binary-level overlap indicator that indicates whether an ON-duration of the high-side switch overlaps with an ON-duration of the low-side switch. A control loop in the switching converter dynamically adjusts the falling dead-time based on the overlap indicator.