Direct-Type Converter Inverter Zero Vector Control
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Solution Overview
Problem
In direct-type AC power converting apparatuses, a prominence of leakage current occurs due to synchronized operation of multiple inverters, leading to concentrated common-mode current issues when modulation rates are close, especially during zero vector operations.
Innovation Solution
A method for controlling a direct-type converting apparatus involving a converter and two inverters, where the inverters are operated using pulse-width modulation with instantaneous space vector control, employing different zero vectors and synchronized carriers with opposite phases to reduce common-mode current by canceling out common-mode currents during zero vector operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple inverters are operated with synchronized pulse-width modulation for increasing output power capacity, then the output power capacity is improved, but the common-mode current becomes concentrated and leakage current prominence occurs
Solution Approach 1:
The patent applies asymmetry by operating multiple inverters with different carrier phases (e.g., 0° and 180°) instead of synchronized operation. This phase difference creates asymmetric timing for switching events, preventing the concentration of common-mode currents that occurs with synchronized operation, while still allowing the inverters to work together to increase output power capacity.
Solution Approach 2:
The patent utilizes periodic action by implementing continuous phase shifting between carrier signals of multiple inverters. The carriers operate with fixed phase differences (such as 180°) that create periodic but non-coincident switching patterns, distributing common-mode current generation over time rather than concentrating it at simultaneous switching moments.
2Device complexity
If inverters use the same carrier for pulse-width modulation to simplify control, then the control complexity is reduced, but the common-mode current timing coincides and leakage current increases
Solution Approach 1:
The patent introduces asymmetry in carrier phases while maintaining a regular pattern (such as 180° phase difference). This approach increases control complexity only slightly by adding phase shift parameters, but effectively prevents the coincidence of common-mode current timing, thereby reducing leakage current without making control excessively complex.
Solution Approach 2:
The patent changes the parameter of carrier phase angle from identical (0° difference) to different values (e.g., 180° difference). This parameter modification fundamentally alters the timing relationship between inverter switching events, distributing common-mode current generation in time and reducing leakage current while maintaining manageable control complexity through standardized phase shift implementations.
Data Source
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AI summary
In a direct-type converting apparatus including a converter and two inverters, a common-mode current is reduced. An output voltage of a converter (3) is given to a pair of DC power supply lines (L1, L2). Inverters (4,5) are connected in parallel with each other between the DC power supply lines (L1, L2). When one inverter (4) is operated based on a first zero vector and the other inverter (5) is operated based on a second zero vector, a commutation is caused in the converter (3). The first zero vector and the second zero vector are different from each other. For example, all of high-arm side switching elements (Sup1, Svp1 Swp1) of the one inverter (4) and low-arm side switching elements (Sun2, Svn2, Swn2) of the other inverter (5) are rendered non-conducting, and all of low-arm side switching elements (Sun1, Svn1, Swn1) of the one inverter (4) and high-arm side switching elements (Sup2, Svp2, Swp2) of the other inverter (5) are rendered conducting.