Switching Power Converter Mode Transition With Pulse-Skipping Compensation
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Solution Overview
Problem
Existing switching power converters experience significant fluctuations in output voltage during mode transitions between synchronous and asynchronous modes, leading to inefficient power consumption and low efficiency under light load conditions.
Innovation Solution
The solution involves adjusting pulse width modulation signals or ramp signals to gradually change the error amplified signal during mode transitions, using pulse skipping and compensation reference levels to mitigate output voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the switching power converter operates in synchronous mode with high PWM duty, then the output voltage can be maintained, but excessive fluctuation occurs during mode transition to asynchronous mode
Solution Approach 1:
The patent applies preliminary action by detecting mode transition conditions in advance and preemptively adjusting the PWM duty cycle before the actual transition occurs. The control circuit monitors the relationship between input voltage and reference voltage, and when transition from synchronous to asynchronous mode is anticipated, it gradually reduces the PWM duty cycle to avoid sudden output voltage fluctuations. This preparatory adjustment ensures a smooth transition between operating modes.
2Stability of the object's composition
If an extra current is generated using transistor and resistor to prevent operation in region B, then output voltage fluctuation is avoided, but unnecessary power consumption increases under light load conditions
Solution Approach 1:
The patent implements dynamics by making the PWM duty cycle adjustable and adaptive rather than fixed. The control circuit dynamically modifies the duty cycle based on real-time operating conditions, specifically the relationship between input voltage and reference voltage, and the current operating mode. This dynamic adjustment allows the converter to optimize performance across different load conditions without requiring continuous extra current injection, thereby reducing unnecessary power consumption under light load while maintaining output stability.
3Adaptability or versatility
If the PWM duty is much larger in synchronous mode compared to asynchronous mode, then the converter can handle varying load conditions, but excessive fluctuation of output voltage occurs during mode transition
Solution Approach 1:
The control circuit detects when the switching power converter is approaching a mode transition point by monitoring input voltage levels and reference voltage comparisons. Before the actual mode transition occurs, the circuit preemptively adjusts the PWM duty cycle to a transitional value that is intermediate between the synchronous mode duty and asynchronous mode duty. This preliminary adjustment prevents the abrupt change in duty cycle that would otherwise cause excessive output voltage fluctuation during mode transition.
4Speed
If the error amplified signal level is abruptly changed during mode transition, then the converter responds quickly to load changes, but output voltage fluctuation increases
Solution Approach 1:
The control circuit prepares for mode transition by gradually adjusting the PWM duty cycle before the actual transition occurs. This preliminary adjustment of the duty cycle results in a gradual change of the error amplified signal level rather than an abrupt change. The gradual transition of the error amplified signal maintains both quick response to load changes and stability of the output voltage during mode transition.
Data Source
AI summary
A switching power converter includes: a power stage circuit for converting an input voltage to an output voltage by switching an inductor with a synchronous or an asynchronous mode; an error amplifier to generate an error amplified signal; a modulation comparator for generating a primary modulation signal by comparing the error amplified signal and a ramp signal; a pulse skipping comparator for generating a pulse skipping control signal by comparing the error amplified signal and a skipping reference signal; and a switching control unit for masking the primary modulation signal by the pulse skipping control signal. During the synchronous mode, the skipping reference signal has a predetermined reference level. At the beginning after the synchronous mode is changed to the asynchronous mode, the skipping reference signal turns to the predetermined reference level superposing a compensation reference level, and subsequently the skipping reference signal gradually returns to the predetermined reference level.