Multi-level Power Converter Over-current Detection Logic

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Solution Overview

Problem

Conventional multi-level power converters face challenges in rapidly and reliably detecting over-current failures due to delays in voltage detection and difficulties in adjusting delay times, especially in three-level inverters, where transient characteristics and load conditions affect voltage changes, making it hard to detect abnormal voltages during switching states.

Innovation Solution

A multi-level power converter design with N-level voltage potentials, featuring switching legs with 2(N-1) series-connected switching elements, 2(N-2) clamp diodes, and a logic operation circuit that uses AND conditions of failure signals from voltage detectors to quickly identify over-current failures without the need for time delay elements, ensuring reliable detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage detection with delay time is used for over-current protection, then switching element protection is achieved, but detection speed is reduced and delay time adjustment becomes difficult

Engineering Contradiction:
Improveover-current protectionVSAvoiddetection delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the over-current detection function into multiple independent voltage detection circuits, each monitoring specific switching elements. By dividing the detection task across multiple parallel circuits with different delay characteristics, the system achieves both reliable protection and rapid detection without requiring a single adjustable delay mechanism.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by using voltage detection with delay for certain switching elements while employing immediate voltage detection for others. This selective approach allows the system to achieve adequate protection for critical elements without the detection delays required by elements with different operational characteristics.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If voltage detection is performed during switching element ON-state, then over-current detection is possible, but detection accuracy is reduced in free-back mode due to zero current flow

Engineering Contradiction:
Improveover-current detection accuracyVSAvoidfree-back mode interference
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent segments the monitoring of switching elements into two distinct groups: those monitored during ON-state and those monitored during OFF-state. This segmentation allows the system to avoid the free-back mode detection problem by directing voltage detection during OFF-state for elements where current would be zero, while using ON-state detection for elements where current flows.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the detection timing for different switching elements based on their operational state. The control circuit determines whether to perform voltage detection during ON-state or OFF-state for each switching element, adapting the detection strategy to the current flow conditions and switching element characteristics.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7489487B2Multi-level power converter
Publication Date: 2009.02.10 TMEIC CORP
  • US7489487B2 patent drawing
  • US7489487B2 patent drawing
  • US7489487B2 patent drawing

AI summary

A multi-level power converter is disclosed. The converter includes a DC power source having N (N is an Integer more than two)-level voltage potentials, and a plurality of switching legs connected in parallel to the DC power source. The switching leg has switching elements in series connection, and clamp diodes connected between intermediate DC potential terminals to middle points of the switching legs. The converter is provided with a control means for supplying gate pulses to the switching elements, and a supervising means for supervising every switching element to output a failure signal. The converter further includes a logic operating means for detecting an over-current failure of main circuit elements to output a device fault signal using the failure signals An operation of the logic operating means at least includes AND condition of at least two failure signals to output the device fault signal.