DC-to-DC Converter Sleep Mode Transition Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

DC-to-DC converters face challenges in smooth mode transitions from sleep to active mode due to transient response issues, particularly with output voltage disturbances caused by improper compensation capacitor voltage and leak currents, especially when switching from light to heavy loads.

Innovation Solution

A local PWM feedback loop is introduced to set and maintain appropriate compensation capacitor voltage during sleep mode, enabling smooth transitions by generating an emulated output voltage and refreshing the capacitor voltage intermittently to prevent discharge, thus ensuring proper error amplifier and duty cycle conditions when switching to PWM mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the converter operates in sleep mode to reduce current consumption, then efficiency is improved, but transient response deteriorates due to improper compensation capacitor voltage

Engineering Contradiction:
Improvecurrent consumptionVSAvoidtransient response
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The error amplifier is enabled before the converter transitions from sleep mode to active mode to pre-charge the compensation capacitor to the appropriate voltage level. This preliminary action ensures that when PWM mode takes over, the compensation capacitor is already at the correct voltage, preventing output voltage disturbances and enabling smooth mode transition while maintaining low current consumption during sleep mode.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the error amplifier is enabled early to set compensation capacitor voltage, then transient response is improved, but current consumption increases

Engineering Contradiction:
Improvetransient responseVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The error amplifier is enabled periodically or intermittently during sleep mode at strategically timed moments to refresh the compensation capacitor voltage without continuously consuming current. This periodic activation maintains the capacitor voltage within appropriate ranges while minimizing current consumption, achieving a balance between transient response reliability and energy efficiency.

Inventive Principle:
Principle #19Periodic action

3Reliability

If the compensation capacitor voltage is held during sleep mode, then mode transition is smoothed, but leak current discharges the capacitor over time

Engineering Contradiction:
Improvemode transition smoothnessVSAvoidcapacitor voltage retention
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The error amplifier is enabled in advance of the mode transition to refresh the compensation capacitor voltage, counteracting the discharge effect of leak current. This preliminary refreshing action ensures the capacitor maintains appropriate voltage levels despite leak current, enabling smooth mode transitions while accounting for energy loss over time.

Inventive Principle:
Principle #10Preliminary action

4Use of energy by moving object

If the converter stays in sleep mode for extended periods, then current consumption is reduced, but compensation capacitor voltage becomes inappropriate due to leak current and input voltage changes

Engineering Contradiction:
Improvecurrent consumptionVSAvoidcompensation capacitor voltage appropriateness
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The error amplifier is enabled periodically during extended sleep mode to refresh the compensation capacitor voltage, adapting it to current input voltage conditions and counteracting leak current discharge. This periodic refreshing maintains voltage appropriateness while minimizing current consumption by keeping the amplifier disabled most of the time.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system monitors the compensation capacitor voltage and enables the error amplifier when voltage levels deviate from appropriate ranges. This feedback mechanism ensures the capacitor voltage remains adaptive to changing conditions (input voltage, leak current) while minimizing unnecessary amplifier activation and current consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9471077B2Method to pre-set a compensation capacitor voltage
Publication Date: 2016.10.18 DIALOG SEMICONDUCTOR (UK) LTD
  • US9471077B2 patent drawing
  • US9471077B2 patent drawing
  • US9471077B2 patent drawing

AI summary

Compensation capacitor voltages of DC-to-DC converters are pre-set without switching to enable smooth transition from sleep mode to active mode. Appropriate compensation capacitor voltages are set regardless of the length of no-switching sleep period or input voltage change. Therefore the converter can always start with appropriate error amplifier and duty conditions, and avoid output voltage disturbance when the PWM control loop takes over in active mode the control of buck converter. The appropriate capacitor voltages are enabled by creating a local PWM feedback loop of a PWM control loop without enabling the output stage. This local PWM feedback loop works intermittently and always sets the appropriate voltage for the error amplifier and compensation capacitor.