Variable Frequency Power Converter Synchronization Circuit

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Solution Overview

Problem

Synchronizing the switching frequencies and phase relationships of multiple variable frequency power converters is challenging due to component tolerances and the need for independent timers, especially when operating at maximum or minimum frequency limits, making it difficult to maintain synchronized operation across a wide frequency range.

Innovation Solution

An integrated time-base system with synchronization circuits that coordinate switching frequencies and phase relationships among power converters, using a daisy-chain loop configuration and control circuit to ensure synchronization, frequency clamping, and restart timer functionality, allowing for unified management of synchronization, maximum frequency limit, and minimum frequency limit within a single circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If independent timers or oscillators are used for each power converter to implement synchronization, maximum frequency limit, and minimum frequency limit functions, then each converter can operate independently, but synchronization between converters becomes difficult due to component tolerances and frequency variations

Engineering Contradiction:
Improveindependent operation capabilityVSAvoidsynchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent merges the three independent time domain functions (synchronization, maximum frequency limit, and minimum frequency limit) into a single integrated time-base circuit. This unified circuit uses one oscillator and one timer to simultaneously perform all three functions, eliminating the need for multiple independent timers. By combining these functions, the system achieves accurate synchronization across multiple power converters while maintaining independent operation capability, as the integrated circuit provides a common time reference that all converters can follow.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated time-base circuit is designed to perform multiple functions universally: it provides synchronization signals, enforces maximum frequency limits, and enforces minimum frequency limits all through a single circuit. This multi-functional approach allows the same circuit architecture to handle diverse timing requirements across different operating conditions, making the system adaptable while maintaining synchronization accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If analog circuitry is used to implement multiple time domain functions, then the converter can operate at different frequency ranges, but matching various timers becomes very difficult due to tolerance variations

Engineering Contradiction:
Improvefrequency range coverageVSAvoidtimer matching complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple timer functions into a single integrated time-base circuit that operates across the entire frequency range. Instead of using separate analog timers for maximum frequency limit, minimum frequency limit, and synchronization, the invention uses one unified timer circuit that handles all timing functions. This eliminates the complexity of matching multiple analog timers while maintaining the ability to operate across wide frequency ranges.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated time-base circuit uses a single oscillator frequency that can be adjusted to cover the entire operating frequency range of the power converter. By changing the oscillator frequency parameter, the system can adapt to different operating conditions (maximum frequency limit, minimum frequency limit, and normal operation) without requiring multiple fixed-frequency timers. This parameter-based approach simplifies the circuit while maintaining versatility.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If separate timers are used for maximum frequency limit and minimum frequency limit functions, then each function can be optimized independently, but synchronization becomes difficult to maintain across the wide frequency range required for both limits

Engineering Contradiction:
Improveindependent function optimizationVSAvoidsynchronization maintenance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges the maximum frequency limit timer and minimum frequency limit timer into a single integrated time-base circuit. This unified circuit simultaneously provides both frequency limit functions along with synchronization, eliminating the need for separate timers. The integration ensures that all timing functions are coordinated through a common time reference, maintaining synchronization reliability across the entire frequency range while still allowing independent optimization of each function through software or control parameters.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8279645B2Synchronizing frequency and phase of multiple variable frequency power converters
Publication Date: 2012.10.02 SEMICON COMPONENTS IND LLC
  • US8279645B2 patent drawing
  • US8279645B2 patent drawing
  • US8279645B2 patent drawing

AI summary

In an embodiment, a power converter system includes a plurality of variable frequency power converters and a plurality of synchronization circuits. Each variable frequency power converter has a switching frequency. Each synchronization circuit is associated with a respective one of the plurality of variable frequency power converters. A control circuit is coupled to and coordinates the plurality of synchronization circuits. The plurality of synchronization circuits and the control circuit are operable to synchronize the switching frequencies of the variable frequency power converters to each other. Each synchronization circuit is operable to: receive a first input signal indicative of the beginning of a switching period for the associated variable frequency power converter; receive a second input signal indicative of the end of the switching period for the associated variable frequency power converter; generate a first output signal for directing a pulse width modulation of the associated variable frequency power converter; and generate a second output signal for coordinating a phase relationship with another variable frequency power converter in the system.