Frequency Converter Thermal Load Redistribution via Voltage Potential Shift

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Solution Overview

Problem

Existing converter motor systems face inefficiencies due to high thermal loads on semiconductor switches and components, leading to increased power losses and reduced utilization, particularly during low-speed operations or standstill conditions.

Innovation Solution

The method involves dynamically adjusting the voltage potential and duty cycle of semiconductor switches to reduce thermal loads by identifying and mitigating the maximum thermal load on switches and associated components, ensuring that the voltage potential is shifted or the duty cycle is altered to maintain efficient operation without permanent conductive states, thereby reducing power losses and increasing the output current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the duty cycle of semiconductor switches is increased to maintain motor current during low-speed operations, then the output performance is improved, but the thermal load on semiconductor switches and components increases excessively

Engineering Contradiction:
Improveoutput currentVSAvoidthermal load
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent changes the voltage potential parameter (neutral point potential) to redistribute thermal loads among semiconductor switches and components. By shifting the voltage potential, the patent alters which switches and components bear the thermal load, thereby reducing the maximum thermal load while maintaining the same output current. This is achieved without changing the fundamental PWM operation but by introducing an additional degree of freedom in voltage potential selection.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the voltage potential is shifted to reduce thermal load on semiconductor switches, then power losses are reduced, but the control complexity increases

Engineering Contradiction:
Improvepower lossVSAvoidcontrol complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent employs a self-service mechanism where the control system automatically monitors thermal loads on semiconductor switches and components, identifies the maximum thermal load, and autonomously adjusts the voltage potential to redistribute the thermal load. This self-regulating approach reduces power losses without requiring external intervention or complex manual control, as the system serves itself by detecting and correcting thermal imbalances.

Inventive Principle:
Principle #25Self-service

3Temperature

If the duty cycle is reduced to lower thermal load on specific semiconductor components, then the thermal stress is reduced, but the motor current and output performance decrease

Engineering Contradiction:
Improvethermal stressVSAvoidmotor current
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The patent changes the voltage potential parameter to redistribute thermal loads among semiconductor switches and components. By shifting the voltage potential, the patent alters which switches and components bear the thermal load, thereby reducing the maximum thermal load while maintaining the same output current. This is achieved without changing the fundamental PWM operation but by introducing an additional degree of freedom in voltage potential selection.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3149842B1Method for controlling a motor, frequency converter and converter motor
Publication Date: 2020.01.08 SCHNEIDER ELECTRIC IND SAS
  • EP3149842B1 patent drawingFigure 1
  • EP3149842B1 patent drawingFigure 2
  • EP3149842B1 patent drawingFigure 3

AI summary

The invention relates to a frequency converter (4) for the semiconductor switches (T1, T2, T3, T4, T5, T6) of which a maximum thermal load is repeatedly determined, a switch-on duration and/or a star point voltage potential being modified, at least for the semiconductor switch (T1, T2, T3, T4, T5, T6) for which the thermal load is at a maximum, in such a way that the thermal load for said semiconductor switch (T1, T2, T3, T4, T5, T6) and/or a semiconductor component (D1, D2, D3, D4, D5, D6) associated therewith is reduced.