Converter Switching-Time Compensation for Voltage Drop Distortion
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Solution Overview
Problem
Existing converter circuits experience voltage drops and delays in power semiconductor switches, leading to deviations in output voltage amplitude and harmonic distortions, which affect the fundamental frequency and current, and introduce undesired harmonics in the frequency spectrum.
Innovation Solution
A method for controlling power semiconductor switches by adjusting switching times with delay and offset times based on measured characteristics and state variables to compensate for voltage drops and delays, ensuring accurate output voltage generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If switching commands are applied directly to power semiconductor switches, then the control system is simple and fast, but voltage drops and delays cause deviations in output voltage amplitude and harmonic distortions
Solution Approach 1:
The patent applies preliminary action by calculating and storing delay times and offset times before switching operations. The control device determines these compensation parameters in advance based on measured state variables, then applies them to adjust switching commands before they reach the power semiconductor switches. This pre-calculation approach enables precise output voltage control without adding complex real-time computation during switching operations.
Solution Approach 2:
The patent implements feedback by continuously measuring state variables (current, voltage, temperature) of the power semiconductor switches and using these measurements to dynamically adjust delay times and offset times. The control device receives feedback from the actual switching behavior and voltage drops, then modifies compensation parameters accordingly to maintain precise output voltage amplitude and minimize harmonic distortions.
2Adaptability or versatility
If different transitions between switching states are used, then the converter circuit can handle various operating conditions, but different delays occur between input signal reception and output voltage generation
Solution Approach 1:
The patent applies local quality by assigning specific delay times and offset times to different transitions between switching states. Each transition receives customized compensation parameters based on its specific characteristics and operating conditions. The control device stores multiple sets of delay and offset times corresponding to different switching states and selects the appropriate set based on the current operating condition, thereby maintaining consistent timing performance across diverse transitions.
3Measurement precision
If voltage drops across the half-bridge circuit are not compensated, then the control system remains simple, but the fundamental amplitude of output voltage and current do not correspond to requested values
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting delay times and offset times based on measured state variables such as current, voltage, and temperature. These parameter adjustments compensate for voltage drops that occur under different operating conditions. The control device modifies compensation parameters in response to changing electrical parameters, ensuring accurate output amplitude without requiring complex real-time voltage drop measurement and correction algorithms.
Data Source
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AI summary
A method for controlling a converter circuit (116) comprises: receiving an input signal (uin, 146) indicating transitions (202) between switching states of the converter circuit (116), each of the transitions (202) having a switching time; generating a modified signal (xin, 128) by additionally moving each of the transitions (202) by an offset time (TI), wherein the offset time (TI) is added to the switching time of the transition (202); generating switching signals (124) for power semiconductor switches (S1, S2, S3, S4, S5, S6) of the converter circuit (116) from the modified signal (xin, 128); and applying the switching signals (124) to the power semiconductor switches (SI, S2, S3, S4, S5, S6) such that an output voltage (yout, 126) is generated; wherein the offset time (TI) is determined from measurement data (xs,m, 132) of at least one state variable (xs) of the converter circuit (116) and from characteristic data (130) encoding a voltage drop of power semiconductor devices (136) of the converter circuit (116) in dependence of at least one state variable (xs); wherein the offset time (TI) is determined such that a time integral of a difference (Δy) between the output voltage (yout, 126) and an ideal output voltage (y'out) is reduced, wherein the ideal output voltage (y'out) is based on the input signal (uin, 146) and/or modified signal (xin, 128) assuming the power semiconductor devices (136) to be ideal.