Convolution Core Accumulation Buffer Layout for Lower Power MAC
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Solution Overview
Problem
Existing systems for multiply/accumulate operations, such as in neural networks and matrix multiplication, face inefficiencies in power consumption and memory usage due to the need for extensive buffering and sequential data fetching.
Innovation Solution
Implementing a system with a convolution core that separates the storage of least significant and most significant bits into different regions within the accumulation buffer and shared memory, disabling clocks for unused regions to conserve power and using a shared memory for less frequently accessed data, thereby optimizing memory usage and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If extensive buffering is used to store accumulation data, then data storage capacity is improved, but power consumption and memory requirements increase
Solution Approach 1:
The accumulation buffer is divided into two separate buffers: a first buffer storing least significant bits and a second buffer storing most significant bits. This segmentation allows the system to manage memory resources more efficiently by storing only necessary data portions in each buffer, reducing overall power consumption while maintaining adequate storage capacity.
Solution Approach 2:
Different regions of the accumulation buffer are allocated different clocking strategies based on their usage patterns. The first buffer (least significant bits) receives continuous clocking while the second buffer (most significant bits) receives clocking only when carry-over occurs, optimizing power consumption locally in each buffer region.
2Ease of operation
If sequential data fetching is used, then memory access simplicity is improved, but productivity and processing speed decrease
Solution Approach 1:
The system performs preliminary actions by maintaining two separate buffers ready for simultaneous access. When a carry-over event occurs, the most significant bits are already prepared in the second buffer, eliminating the need for sequential fetching and enabling immediate continuation of processing, thus improving productivity without complicating memory access.
3Quantity of substance
If full accumulation buffer is allocated to each convolution core, then data storage capacity is improved, but silicon size and device complexity increase
Solution Approach 1:
Multiple convolution cores share a common second buffer for storing most significant bits. This merging approach reduces the total silicon area required compared to providing separate full-size buffers to each convolution core, while still maintaining adequate storage capacity through shared resources.
Data Source
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AI summary
Example accumulation systems and methods are described. In one implementation, data is received for processing. A multiplication operation is performed on the received data to generate multiplied data. An addition operation is performed on the multiplied data to generate a result. At least a portion of the least significant bits of the result are stored in a first region of an accumulation buffer of a convolution core. And, at least a portion of the remaining bits of the result are stored in a shared memory that is separate from the convolution core.