Convolution MAC Architecture Using Integer Circuits for Floating-Point Data

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Solution Overview

Problem

Existing convolution hardware accelerators face challenges in efficiently supporting multiple integer and floating-point data types, leading to increased chip die size and manufacturing costs due to the use of floating-point multiplier and adder circuits.

Innovation Solution

Implementing MAC cells with integer multiplier and adder circuits, along with shift and conversion circuits, to perform floating-point operations, reducing chip die size and enabling support for various data types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If floating-point multiplier and adder circuits are used to support floating-point data types, then the ability to process floating-point data is improved, but the chip die size and manufacturing costs increase

Engineering Contradiction:

Improvedata type support capabilityVSAvoidchip die size

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent changes the fundamental parameter of the multiplier circuit from floating-point to integer-based operation. By representing floating-point numbers as integers (scaling the mantissa and handling exponents separately), the system uses integer multiplier circuits that are smaller and cheaper than floating-point circuits, while still achieving floating-point multiplication capability through subsequent shift operations to adjust the result's scale.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the complex floating-point arithmetic mechanism with a simpler integer arithmetic mechanism combined with bit-shifting operations. Instead of using dedicated floating-point ALU circuits with complex exponent and mantissa handling, the system uses integer multipliers followed by shift circuits to achieve the same mathematical result with reduced hardware complexity and smaller die area.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If floating-point multiplier and adder circuits are used to support floating-point data types, then the ability to process floating-point data is improved, but the manufacturing costs increase

Engineering Contradiction:

Improvedata type support capabilityVSAvoidmanufacturing cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs simpler, cheaper integer multiplier circuits instead of expensive floating-point multiplier circuits. The integer multipliers are less complex and can be manufactured more cheaply, and the system compensates for the simplified architecture by using additional but inexpensive shift and add circuits to achieve the required floating-point operation functionality.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Area of stationary object

If integer multiplier and adder circuits are used instead of floating-point circuits, then the chip die size is reduced, but the complexity of performing floating-point operations increases

Engineering Contradiction:

Improvechip die sizeVSAvoidoperation complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent segments the floating-point operation into distinct functional stages: integer multiplication of scaled mantissas, separate exponent addition, and final result scaling via shift operations. By dividing the floating-point multiplication task into these discrete integer-based steps, the system manages complexity through modular design while using smaller integer circuits instead of complex floating-point circuits.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate integer representations as a mediator between the input floating-point numbers and the final floating-point result. The floating-point operands are converted to integer form (scaled mantissas) before multiplication, and the integer product is then converted back to floating-point form through shift operations that restore the proper scale based on the summed exponents, thereby managing complexity through intermediate representation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentEP4312119B1Convolution hardware accelerator

Publication Date: 2026.02.25 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD

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AI summary

A device includes integer multiplier circuits and a multiplexer circuit provides portions of mantissas of feature elements and portions of mantissas of weight elements to respective integer multiplier circuits, wherein the feature elements and the weight elements are floating-point data types, and wherein each integer multiplier circuit multiplies a respective portion of the mantissa of a feature element by a respective portion of the mantissa of a weight element to generate a partial product. A first shift circuit shifts bits of the partial products based on exponents of the feature elements and of the weight elements, and a first integer adder circuit adds the shifted partial products to generate a sum. A composition circuit generates an output element based on the sum generated by the first integer adder circuit, the exponents of the plurality of feature elements, and the exponents of the plurality of weight elements.