Convolutional Coding With Majority Logic for Low-Power UWB Reception
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Solution Overview
Problem
Existing ultra-wideband communication systems require complex circuitry and high power consumption for transmitting and receiving convolutional codes, which limits their performance and efficiency.
Innovation Solution
A communication system that generates an n-bit codeword using m identical generators, where m is greater than n/2, and employs a majority logic element to determine the input bit based on partial detection signals exceeding a threshold, reducing circuitry and power consumption while maintaining performance comparable to prior art techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional convolutional code transmission methods are used in ultra-wideband communication systems, then reliable data transmission is achieved, but circuit complexity and power consumption increase significantly
Solution Approach 1:
The patent combines multiple identical generators (m generators where m > n/2) to create a redundant coding structure. The majority logic element merges the outputs of these generators, allowing the system to tolerate failures in up to floor(n/2) generators while maintaining reliable decoding. This merging approach improves reliability without proportionally increasing circuit complexity.
Solution Approach 2:
The patent changes the structural parameters of the convolutional code by using m identical generators instead of traditional distinct generators. By setting m > n/2 and using a majority logic element, the system achieves a different code structure that maintains error correction capability while simplifying the generator design and reducing overall circuit complexity.
2Reliability
If conventional convolutional code transmission methods are used in ultra-wideband communication systems, then reliable data transmission is achieved, but power consumption increases
Solution Approach 1:
The patent combines multiple identical generators (m generators where m > n/2) to create a redundant coding structure. The majority logic element merges the outputs of these generators, allowing the system to tolerate failures in up to floor(n/2) generators while maintaining reliable decoding. This merging approach improves reliability without proportionally increasing circuit complexity.
Solution Approach 2:
The patent changes the structural parameters of the convolutional code by using m identical generators instead of traditional distinct generators. By setting m > n/2 and using a majority logic element, the system achieves a different code structure that maintains error correction capability while simplifying the generator design and reducing overall circuit complexity.
3Device complexity
If m identical generators are used with m > n/2, then circuit complexity is reduced and power consumption decreases, but code design flexibility is limited
Solution Approach 1:
The patent uses m identical generators that can handle multiple functions: encoding, error detection, and error correction through the majority logic element. This universal design allows the same generator structure to be reused multiple times, reducing overall circuit complexity while maintaining the ability to correct errors and adapt to different transmission conditions.
Solution Approach 2:
The patent changes the structural parameters of the convolutional code by using m identical generators instead of traditional distinct generators. By setting m > n/2 and using a majority logic element, the system achieves a different code structure that maintains error correction capability while simplifying the generator design and reducing overall circuit complexity.
Data Source
AI summary
In a communication system, a transmitter receives an input bit, and in response thereto, generates at least an n-bit codeword, each bit of which is generated by a respective one of n generators of which m are exactly the same, m being greater than n/2. A receiver comprises: m detectors, each adapted to receive the bit generated by a respective one of the m generators, and provide a respective one of m partial detection signals if a strength of the received bit exceeds a predetermined minimum threshold; and a majority logic element adapted to receive each of the m partial detection signals, and provide an output bit indicative of the input bit only if more than m/2 of the received m partial detection signals exceeds the minimum threshold.