Channel coding method and apparatus
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Solution Overview
Problem
Passive internet of things (IoT) terminal devices face challenges in implementing complex channel coding due to power consumption and complexity limitations, leading to poor channel coding performance.
Innovation Solution
A channel coding method that enables convolutional coding without requiring the complete original bit sequence after CRC attachment, by using a convolutional encoder with an initial shift register value set to the last N bits of the to-be-encoded bit sequence, thereby reducing buffer/storage overheads and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex channel coding methods (such as starting channel coding after CRC attachment or performing rate matching operation) are used, then channel coding performance is improved, but power consumption and device complexity increase beyond the limits of passive IoT terminal devices
Solution Approach 1:
The patent applies partial action by performing only the essential convolutional coding operation without the full suite of standard channel coding procedures. Specifically, it omits the rate matching operation and block interleaving that would normally follow convolutional coding, while still achieving acceptable channel coding performance for passive IoT devices with severe power constraints
Solution Approach 2:
The patent changes the parameter of channel coding procedure completeness by selectively removing certain operations (rate matching, block interleaving) from the standard channel coding flow. This parameter change allows passive IoT devices to achieve functional channel coding capability with dramatically reduced power consumption and complexity
2Reliability
If rate matching operation and block interleaving are performed after convolutional coding, then channel coding performance is improved, but buffer/storage overheads and processing complexity increase
Solution Approach 1:
The patent extracts and removes the rate matching operation and block interleaving steps from the standard channel coding procedure. By taking out these complex operations, the patent reduces buffer/storage overheads and processing complexity while retaining the core convolutional coding functionality that provides essential error protection
Solution Approach 2:
The patent segments the channel coding process into essential and non-essential components. It identifies convolutional coding as the essential core component that must be implemented, while categorizing rate matching and block interleaving as non-essential components that can be omitted in power-constrained passive IoT devices
3Reliability
If complete original bit sequence after CRC attachment is used for convolutional coding, then channel coding performance is improved, but buffer/storage overheads increase power consumption
Solution Approach 1:
The patent applies partial action by using only the necessary portion of the bit sequence for convolutional coding without requiring the complete original bit sequence with CRC attachment. This reduces the amount of data that must be buffered and stored, thereby reducing power consumption in passive IoT devices
Data Source
AI summary
This application provides a channel coding method and apparatus, including: A terminal device generates a first bit sequence, and determines a second bit sequence based on the first bit sequence, where the second bit sequence includes M bits, any bit in the last N bits in the second bit sequence has a same value as a bit that is in the first N bits in the first bit sequence and that is in one-to-one correspondence with the bit, M and N are positive integers, and M is greater than N; performs convolutional coding on the second bit sequence based on a convolutional encoder, to obtain a third bit sequence, where an initial value of a shift register of the convolutional encoder is equal to values of the last N bits in the second bit sequence, and the convolutional encoder includes N shift registers; and sends the third bit sequence.


