Convolutional Decoder Using XOR Paths for Low-Power Reception
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Solution Overview
Problem
Existing convolutional decoders, such as Viterbi decoders, require significant computational effort, making them power-intensive and unsuitable for low-power equipment like battery-operated devices.
Innovation Solution
A decoder is proposed that uses a shift register, one-bit quantizers, and exclusive OR gates to decode convolutionally coded signals represented as multilevel signals. This decoder selects output bits based on the absolute values of polynomial-derived multilevel signals, allowing for simpler and less power-consuming decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a Viterbi decoder is used to decode convolutionally coded signals, then decoding accuracy is improved, but power consumption increases
Solution Approach 1:
The Viterbi decoder is segmented into two parts: a soft Viterbi decoder for high-accuracy decoding and a simplified decoder for low-power operation. The system selectively activates one or the other based on power availability, allowing accurate decoding when needed and power-saving operation when battery power is limited.
Solution Approach 2:
The decoder dynamically adjusts its complexity based on power conditions. The control logic monitors power availability and switches between the full Viterbi decoding algorithm and a simplified decoding approach, enabling the system to adapt its computational requirements to match available power resources.
2Device complexity
If a simplified decoder is used to reduce power consumption, then device complexity is reduced, but decoding accuracy deteriorates
Solution Approach 1:
The decoding function is segmented into a simplified decoder for low-complexity operation and a full Viterbi decoder for high-accuracy operation. By dividing the decoding task and selectively applying different algorithms, the system achieves low complexity when power is limited while maintaining the option for high accuracy when needed.
Solution Approach 2:
The system changes the decoding parameter (algorithm complexity) based on power conditions. When power is abundant, the full Viterbi algorithm is used for maximum accuracy. When power is limited, the simplified algorithm with fewer computational steps is used, dynamically adjusting the decoding parameter to match available resources.
3Power
If hard decoding is used instead of soft decoding, then computational effort is reduced, but error correction capability deteriorates
Solution Approach 1:
The decoder dynamically selects between hard decoding and soft decoding based on power availability and signal conditions. The control logic evaluates whether the simplified hard decoding provides sufficient performance or if the more computationally intensive soft decoding is needed to maintain error correction capability.
Solution Approach 2:
The system uses feedback from signal quality metrics and power condition monitoring to select the appropriate decoding mode. When the signal quality is high and power is limited, hard decoding suffices. When signal quality degrades or power is available, the system switches to soft decoding to maintain error correction performance.
Data Source
AI summary
A non-systematic convolutional decoder of a convolutionally encoded multi-level data stream includes a shift register and two or more paths of exclusive-OR (XOR) gates, arranged to reconstruct an original input information stream, each path having a quantiser arranged to quantise the signal to two levels, and a set of XOR gates arranged to match an encoding path in an associated convolutional encoder, and a selector arranged to feed an output from each path to a single input of the shift register. If the paths have differing values at their output, the selector may choose the value from the path based upon a function of the multi-level signals associated with each path, such as the path with the largest absolute signal level. The decoder provides a simple means for decoding signals while allowing the signal to also or instead be decoded using e.g. a Viterbi decoder if higher performance is required.