Microelectronic Cooling Interposer with Fluidic Channels

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Solution Overview

Problem

Conventional cooling solutions for electronic components, such as microprocessors and integrated circuits, face challenges in efficiently managing non-uniform heat generation and high power density, particularly in managing hotspots, as they become smaller and more complex, leading to performance degradation and potential failure.

Innovation Solution

The implementation of a microelectronic assembly with a cooling interposer that includes a fluidic channel between the die and the package substrate, allowing for the circulation of a coolant through the interposer to effectively dissipate heat from hotspots, utilizing conductive structures for thermal and electrical connectivity, and underfill materials to manage thermal expansion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional cooling solutions are used, then heat dissipation is provided, but they cannot efficiently manage non-uniform heat generation and hotspots

Engineering Contradiction:
Improvecomponent reliabilityVSAvoidhotspot temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent implements cooling channels with varying cross-sectional areas positioned at different locations beneath the die. Channels under high-power density regions have larger cross-sectional areas to provide greater cooling capacity where hotspots occur, while channels under lower-power regions have smaller areas. This non-uniform channel design matches the local heat generation profile, enabling effective hotspot management and improving component reliability.

Inventive Principle:
Principle #3Local quality

2Power

If electronic components become smaller and more complex, then power density increases, but heat dissipation efficiency decreases

Engineering Contradiction:
Improvepower densityVSAvoidheat dissipation efficiency
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The cooling solution divides the cooling interposer into multiple discrete cooling channels rather than using a single uniform cooling structure. Each channel is independently configured with specific dimensions and positions to address localized heat generation patterns. This segmentation allows the cooling system to efficiently manage heat from high-power-density regions in smaller, more complex electronic components by providing targeted cooling capacity where needed.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides enhanced heat dissipation capabilities, improving the reliability and performance of electronic components by effectively managing hotspots and reducing thermal stress, making it suitable for high-performance computing and multi-chip IC packages.

Implementation Method 1

a fluidic channel between the first surface of the die and the surface of the package substrate... allowing for the circulation of a coolant through the interposer to effectively dissipate heat

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 2

utilizing conductive structures for thermal and electrical connectivity

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

underfill materials to manage thermal expansion

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11521914B2Microelectronic assemblies having a cooling channel
Publication Date: 2022.12.06 INTEL CORP
  • US11521914B2 patent drawing
  • US11521914B2 patent drawing
  • US11521914B2 patent drawing

AI summary

Microelectronic assemblies that include a cooling channel, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface, a die having a surface, and a fluidic channel between the surface of the die and the surface of the package substrate, wherein a top surface of the fluidic channel is defined by the surface of the die and a bottom surface of the fluidic channel is defined by the surface of the package substrate. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a surface; and an interposer having a fluidic channel between the surface of the die and the surface of the package substrate.