Coplanar Die Packaging With Conductive Paste for Fan-Out Reliability

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Solution Overview

Problem

Ensuring the reliability of integrated fan-out packages in the semiconductor industry, which face challenges due to their compactness and increased integration density, is a significant technical issue.

Innovation Solution

A method of forming semiconductor devices involves using a conductive paste with high thermal conductivity to enhance heat dissipation and reliability, along with a process that includes forming conductive connectors and encapsulants to secure and connect integrated circuit dies to an interposer, ensuring proper electrical and thermal connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If integrated fan-out packages use smaller feature sizes to increase integration density, then more electronic components can be integrated into a given area, but the reliability of the packages deteriorates

Engineering Contradiction:

Improveintegration densityVSAvoidpackage reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The package structure is divided into multiple layers including a substrate, multiple interconnect layers, and an encapsulant layer. Each layer performs specific functions for signal transmission, power distribution, or protection, allowing high integration density while maintaining reliability through functional segmentation

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The package uses composite material structures including copper interconnect layers with barrier layers, encapsulants with filler materials for thermal management, and multi-layer substrate compositions that provide mechanical strength while enabling compact design

Inventive Principle:

Principle #40Composite materials

2Volume of moving object

If integrated fan-out packages are made more compact, then package size is reduced, but heat dissipation becomes more difficult

Engineering Contradiction:

Improvepackage sizeVSAvoidheat dissipation

Core Design Contradiction:

Volume of moving objectVSTemperature

Solution Approach 1:

Thermal interface materials and heat spreader layers are introduced as intermediaries between the high-density interconnect structures and the external environment. These intermediary layers facilitate heat transfer from compact internal components to larger external heat sinks

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The thermal properties of package materials are optimized by adjusting filler material composition, density, and distribution in the encapsulant. Thermal conductivity parameters are changed through material selection and structural design to enable effective heat dissipation in compact volumes

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the reliability and thermal management of integrated fan-out packages, enhancing their performance and longevity by providing effective heat dissipation and secure electrical connections.

Implementation Method 1

A method of forming semiconductor devices involves using a conductive paste with high thermal conductivity to enhance heat dissipation

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20240021491A1Semiconductor device and method of forming the same

Publication Date: 2024.01.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device includes a first integrated circuit die and a second integrated circuit die. The first integrated circuit die includes a conductive paste on a first surface of the first integrated circuit die, wherein the conductive paste is in direct contact with the first surface of the first integrated circuit die. The second integrated circuit die is disposed aside the first integrated circuit die, wherein a surface of the conductive paste is substantially coplanar with a surface of the second integrated circuit die.