Coplanar Molded Semiconductor Package for EMI and Heat Dissipation
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Solution Overview
Problem
Current semiconductor packages face challenges in reliability due to issues such as electrical connectivity, mechanical strength, and electromagnetic interference, which affect their durability and performance in electronic products.
Innovation Solution
A semiconductor package design incorporating a first redistribution layer, a semiconductor chip, a mold layer, and a metal layer with specific configurations, including mold vias and a second redistribution layer, to enhance electrical connectivity, mechanical strength, and EMI shielding, while preventing shape defects and improving heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor package structure is used, then the device complexity is low, but the reliability is insufficient due to electrical connectivity issues, mechanical strength problems, and electromagnetic interference
Solution Approach 1:
The package structure is segmented into distinct functional layers: redistribution layers for electrical connectivity, mold layer for mechanical protection, and metal layers for EMI shielding. This segmentation allows each layer to optimize its specific function, improving overall reliability while managing complexity through modular design
Solution Approach 2:
The patent implements nested structures where the first semiconductor chip is embedded in the mold layer, which is disposed on the first redistribution layer. The second redistribution layer is then formed on the metal layer, creating a nested multi-layer configuration that enhances reliability through integrated protection and connectivity
2Stability of the object's composition
If the mold layer upper surface is not coplanar with the semiconductor chip upper surface, then the manufacturing process is simpler, but shape defects occur and mechanical strength is reduced
Solution Approach 1:
The mold layer is designed with a specific parameter constraint where its upper surface is coplanar with the upper surface of the first semiconductor chip. This parameter change ensures shape stability and prevents defects while maintaining manufacturing feasibility through controlled molding processes
3Reliability
If adequate EMI shielding is implemented, then the reliability improves, but the device complexity and number of layers increase
Solution Approach 1:
The metal layer serves multiple functions simultaneously: it provides EMI shielding to protect the semiconductor chip, acts as an electrical connection layer between the redistribution layers, and contributes to the overall structural integrity of the package. This multi-functionality improves reliability without proportionally increasing complexity
4Duration of action of stationary object
If heat dissipation structures are added, then the durability improves, but the device complexity increases
Solution Approach 1:
The metal layer and redistribution layers serve dual purposes: providing electrical connectivity between components and acting as heat dissipation pathways. By conducting heat away from the semiconductor chip through these existing conductive layers, the patent improves durability without adding separate heat dissipation structures that would increase complexity
Data Source
AI summary
A semiconductor package includes a first redistribution layer, a first semiconductor chip on the first redistribution layer, a mold layer covering a side surface of the first semiconductor chip and a top surface of the first redistribution layer and having an upper surface coplanar with an upper surface of the first semiconductor chip, a metal layer on the first semiconductor chip and the mold layer to be in contact with upper surfaces of the mold layer and the first semiconductor chip, and a second redistribution layer on the metal layer.