Coplanar Power Terminal Layout in Semiconductor Modules for Lower Inductance
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Solution Overview
Problem
Parasitic impedance, particularly stray inductance, adversely affects the performance of semiconductor devices in power modules due to magnetic fields generated by high currents, leading to inefficiencies and reduced performance.
Innovation Solution
The implementation of multiple positive power supply terminals laterally disposed from a negative supply terminal, with parallel and coplanar current paths, and internal routing of metal layers to overlap with the negative power supply terminal, reducing mutual interference of magnetic fields and stray inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high currents are conducted by power semiconductor devices, then power delivery capability is improved, but parasitic impedance (stray inductance) increases due to magnetic field interference
Solution Approach 1:
The patent applies magnetic field cancellation by arranging current paths in opposite directions. The negative power supply terminal is positioned between two positive power supply terminals, creating opposing magnetic fields that cancel each other out. This converts the harmful magnetic field interference into a beneficial cancellation effect, reducing parasitic impedance while maintaining high current conduction capability
Solution Approach 2:
The patent transitions from coplanar terminal arrangement to a three-dimensional configuration where connection tabs extend in opposite directions perpendicular to the substrate surface. This spatial arrangement in multiple dimensions allows current paths to be parallel and adjacent without being coplanar, enabling magnetic field cancellation while maintaining electrical connectivity
2Object-affected harmful factors
If multiple positive power supply terminals are laterally disposed from the negative terminal, then magnetic field cancellation is improved, but device complexity increases
Solution Approach 1:
The patent segments the power supply terminals into distinct positive and negative terminals with separate connection tabs. The negative terminal is divided into multiple segments positioned between positive terminals, allowing independent current paths. This segmentation enables magnetic field cancellation while maintaining a systematic and manufacturable structure
Solution Approach 2:
The patent employs asymmetric positioning where the negative power supply terminal is located between two positive terminals rather than in a symmetric alternating pattern. This asymmetric arrangement optimizes magnetic field cancellation by creating adjacent parallel current paths with opposite directions, while simplifying the overall terminal layout and connection scheme
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves a 15-50% reduction in stray inductance, improving electrical efficiency and performance by canceling out magnetic fields, thus enhancing the operational effectiveness of semiconductor device modules.
Implementation Method 1
reducing mutual interference of magnetic fields and stray inductance through parallel and coplanar current paths
Data Source
AI summary
In general aspect, a module can include a substrate having a semiconductor circuit implemented thereon, and a negative power supply terminal electrically coupled with the semiconductor circuit via the substrate. The negative power supply terminal includes a connection tab arranged in a first plane. The module also includes a first positive power supply terminal electrically and a second positive power supply terminal that are coupled with the semiconductor circuit via the substrate. The first positive power supply terminal being laterally disposed from the negative power supply terminal, and including a connection tab arranged in the first plane. The second positive power supply terminal is laterally disposed from the negative power supply terminal and arranged in the first plane, such that the negative power supply terminal is disposed between the first positive power supply terminal and the second positive power supply terminal.