Coplanar Trench Filling Structure With Protection Layer

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Solution Overview

Problem

Challenges arise during the scaling-down process of semiconductor devices, affecting quality, yield, performance, and reliability, and increasing complexity.

Innovation Solution

A semiconductor device design featuring a substrate with concave and flat portions, and protection layers that maintain a substantially coplanar surface, achieved through a method involving trench formation, filling, and planarization processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional filling processes are used in trench structures, then material can be deposited, but non-planar surfaces and voids are formed affecting subsequent processes

Engineering Contradiction:
Improvesurface planarityVSAvoidfilling process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The filling process is divided into multiple sequential steps: first forming a bottom filling layer, then forming a second filling layer on top. This segmentation allows each layer to be optimized independently, with the bottom layer providing structural support and the second layer providing planarization, thereby achieving surface planarity while managing process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bottom filling layer is formed in advance before the second filling layer. This preliminary action creates a foundation that prevents void formation and ensures proper material distribution in subsequent steps, addressing surface planarity issues before they affect later processing.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If trench filling is performed without protection layers, then manufacturing is simpler, but surface integrity and reliability are compromised

Engineering Contradiction:
Improvesurface integrityVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A protection layer is formed on top of the second filling layer before subsequent processing steps. This protection layer acts as a cushion that prevents damage to the underlying filling layers and maintains surface integrity during handling and processing, thereby improving reliability while accepting increased structural complexity.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If device dimensions are scaled down to improve computing ability, then computing performance increases, but quality, yield, and reliability issues increase

Engineering Contradiction:
Improvecomputing abilityVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different regions of the semiconductor device are filled with different materials and structured differently. The bottom filling layer and second filling layer have distinct compositions and functions tailored to local requirements, allowing optimization of each region for reliability while supporting overall device scaling and computing performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design ensures a flat surface for subsequent processes, improving the reliability of the semiconductor device.

Implementation Method 1

performing a surface oxidation process to form a first protection layer on the first center layer

Methodology Applied
Scientific EffectSurface oxidation: Oxidation

Data Source

PatentUS12575404B2Semiconductor device with protection layer and method for fabricating the same
Publication Date: 2026.03.10 NAN YA TECH
  • US12575404B2 patent drawing
  • US12575404B2 patent drawing
  • US12575404B2 patent drawing

AI summary

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a first outer filling layer including a first concave portion inwardly positioned in the substrate and including a U-shaped cross-sectional profile, and a first flat portion positioned on the substrate and connecting to the first concave portion; a first center layer positioned on the first concave portion of the first outer filling layer; and a first protection layer positioned on the first center layer. A top surface of the first concave portion and a top surface of the first protection layer are substantially coplanar.