Copolymer Patterning for Vertically Aligned MOSFET Features

The patent introduces a vertical dimension by forming a three-dimensional channel structure where the channel extends vertically through multiple levels. This 3D architecture allows continued scaling of the device footprint while maintaining effective channel length and improving operational properties through enhanced electric field control and carrier transport in the vertical direction.

The patent employs composite material structures including stacked semiconductor layers with different materials (e.g., SiGe source/drain regions with silicon channel, or III-V semiconductor layers) to maintain carrier mobility and electrical characteristics despite device scaling. The composite structure enables optimization of different regions for specific functions while keeping the overall device size reduced.

The patent utilizes self-service by employing block copolymer materials that automatically phase-separate and self-align into vertical cylindrical structures during the annealing process. The thermodynamic driving force of microphase separation in block copolymers causes the polymers to spontaneously organize into the desired vertical alignment without requiring external guidance patterns or complex alignment procedures, thereby achieving high manufacturing precision through material self-organization.

The patent exploits phase transitions by heating the block copolymer layer above its glass transition temperature during annealing. This phase transition enables the polymer chains to become mobile and reorganize into the thermodynamically stable vertical cylindrical morphology. The phase transition process drives the spontaneous alignment and ordering of the copolymer domains, achieving precise vertical patterns while using a relatively simple thermal processing step.