Copper Electrodeposition Additives for Void-Free Interconnect Filling

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Solution Overview

Problem

In the microelectronics industry, electrolytic copper metallization faces challenges in filling small interconnect features with copper, leading to defects such as voids, overplating, and rough surfaces, which affect the electrical connectivity and yield of semiconductor manufacturing.

Innovation Solution

The use of a suppressor composition comprising a polyether bonded to a nitrogen of an oligo(alkylene imine) with a specific block copolymer structure of propylene oxide and ethylene oxide units, along with a leveler and accelerator, in the electrolytic plating process to enhance copper deposition and reduce defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional electrolytic copper deposition is used to fill small interconnect features, then copper can be deposited onto the substrate, but voids and defects form in the filled features

Engineering Contradiction:
Improvefilling qualityVSAvoidvoids and defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies suppressor and accelerator additives that create locally different deposition rates: suppressors reduce copper deposition on sidewalls and tops of interconnect features, while accelerators enhance deposition on feature bottoms, enabling void-free bottom-up filling

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces organic additives (suppressors and accelerators) as intermediaries that mediate the copper deposition process by adsorbing on specific surfaces and modifying local electrochemical reactions to achieve uniform filling

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If rapid bottom-up superfilling is achieved using suppressor and accelerator additives, then voids are reduced, but overplating and mounding occur on the facial plane

Engineering Contradiction:
Improvefilling qualityVSAvoidsurface uniformity
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent uses leveler additives that selectively reduce copper deposition on the facial plane (overplating regions) while maintaining rapid deposition in interconnect features, thereby planarizing the surface and removing mounds and bumps

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces leveler additives as intermediaries that adsorb on protruding surface regions and suppress localized deposition, mediating between the rapid bottom-up filling process and the need for planar surfaces

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If copper is deposited to fill high aspect ratio interconnect features, then electrical interconnection is achieved, but the deposition process becomes increasingly difficult as feature size decreases

Engineering Contradiction:
Improveelectrical interconnectionVSAvoiddeposition difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent modifies deposition parameters by using pulsed or alternating current regimes, adjusting voltage and current density, and controlling additive concentrations to enhance copper penetration into high aspect ratio features while maintaining deposition control

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables rapid bottom-up superfilling of submicron features with reduced voids and improved surface smoothness, enhancing the filling of high aspect ratio interconnects and increasing the yield of semiconductor products.

Implementation Method 1

electrolytic copper metallization is employed in the field of microelectronics manufacture to provide electrical interconnection

Methodology Applied
Scientific EffectElectrochemical deposition: Electrodeposition

Implementation Method 2

electrochemical deposition is a preferred method for applying copper since it is more economical than other deposition methods

Methodology Applied
Scientific EffectElectrolysis: Electrolysis

Data Source

PatentUS20240018678A1Copper Electrodeposition in Microelectronics
Publication Date: 2024.01.18 MACDERMID ENTHONE INC
  • US20240018678A1 patent drawing
  • US20240018678A1 patent drawing
  • US20240018678A1 patent drawing

AI summary

An electrolytic plating composition for superfilling submicron features in a semiconductor integrated circuit device and a method of using the same. The composition comprises (a) a source of copper ions to electrolytically deposit copper onto the substrate and into the electrical interconnect features, and (b) a suppressor comprising at least three amine sites, said polyether comprising a block copolymer substituent comprising propylene oxide (PO) repeat units and ethylene oxide (EO) repeat units, wherein the number average molecular weight of the suppressor compound is between about 1,000 and about 20,000.