Copper Interconnects with Air Gaps for RC Delay Reduction

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Solution Overview

Problem

As integrated circuit devices shrink, signal delay due to resistive-capacitive (RC) effects becomes more pronounced, and reducing the capacitance of the interlayer insulating layer with copper interconnects has been difficult.

Innovation Solution

Forming air gaps between copper interconnects by depositing a non-conformal copper layer over sacrificial rails, allowing the copper to reflow and form menisci, then removing the sacrificial material and depositing a non-conformal insulating layer to create continuous air gaps, replacing the conventional SiO2 insulating layer with air gaps having a lower dielectric constant.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional SiO2 insulating layer is used with copper interconnects, then manufacturing process is simple, but capacitance cannot be reduced effectively

Engineering Contradiction:
ImprovecapacitanceVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent introduces air gaps (porous structure with air as filling material) between copper interconnects to replace the conventional solid SiO2 insulating layer. This porous structure dramatically reduces the dielectric constant from approximately 4.0 for SiO2 to 1.0 for air, thereby reducing capacitance and RC effects while maintaining electrical insulation functionality.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent creates a composite structure combining copper interconnects with air gaps and remaining SiO2 insulating material. The insulating layer becomes a composite of air gaps and SiO2, where the air portions provide low-dielectric constant regions that reduce capacitance while the SiO2 provides structural support and complete insulation where needed.

Inventive Principle:
Principle #40Composite materials

2Productivity

If device size is reduced to increase density, then device density increases, but RC effects become more pronounced

Engineering Contradiction:
Improvedevice densityVSAvoidsignal delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent changes the dielectric parameter (dielectric constant) of the insulating material from approximately 4.0 (SiO2) to 1.0 (air) by introducing air gaps. This parameter change directly reduces the RC time constant, thereby reducing signal delay and allowing smaller device dimensions to maintain acceptable signal speeds.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces signal delay by lowering the dielectric constant between copper interconnects, enhancing the performance of semiconductor devices by reducing RC effects and improving device density and speed.

Implementation Method 1

heating the semiconductor device to a temperature above 300° C. to reflow the copper layer from the top of the sacrificial rails into the trenches

Methodology Applied
Scientific EffectReflow: Melting

Implementation Method 2

sputtering a non-conformal copper layer at a temperature above 150° C. in the trenches and over the sacrificial rails

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 3

depositing a non-conformal insulating layer over the copper rails such that air gaps are formed between adjacent copper rails

Methodology Applied
Scientific EffectNon-conformal deposition: Deposition (physical)

Data Source

PatentUS9030016B2Semiconductor device with copper interconnects separated by air gaps
Publication Date: 2015.05.12 SAMSUNG ELECTRONICS CO LTD
  • US9030016B2 patent drawing
  • US9030016B2 patent drawing
  • US9030016B2 patent drawing

AI summary

A semiconductor device including a plurality of copper interconnects. At least a first portion of the plurality of copper interconnects has a meniscus in a top surface. The semiconductor device also includes a plurality of air gaps, wherein each air gap of the plurality of air gaps is located between an adjacent pair of at least the first portion of the plurality of bit lines.