Copper-Bonded Partitioned Interposers for Scalable High-Density Packaging
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Solution Overview
Problem
Existing processor modules face challenges in scaling up due to limited interposer size and inefficient manufacturing of large dies, which are expensive and result in low yield, while solder bumps are limited by manufacturing and reliability considerations.
Innovation Solution
The use of interposers with active and passive components, copper bonding, and bridges to create a functionally large interposer from smaller dies, allowing for higher density connections and improved heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If large interposers are used to accommodate more circuitry, then computational capacity increases, but manufacturing yield decreases and cost increases
Solution Approach 1:
The patent divides a large interposer into multiple smaller interposer dies (first interposer die, second interposer die, etc.). Each die can be manufactured independently with high yield, and they are subsequently connected through copper bonding to form a functionally large interposer structure that accommodates the required computational capacity.
Solution Approach 2:
The patent combines multiple smaller interposer dies into a unified functional structure through copper bonding connections. The bridges connecting these dies create an electrically and thermally integrated system that behaves as a single large interposer, resolving the contradiction between size and manufacturing efficiency.
2Ease of manufacture
If solder bumps are used for mounting, then manufacturing is simplified, but connection density and pitch are limited
Solution Approach 1:
The patent replaces traditional solder bump mechanical connections with copper-to-copper bonding. This substitution enables much finer pitch connections (higher density) while maintaining manufacturing feasibility, as copper bonding can achieve sub-10-micron pitches compared to the larger pitches required for solder bumps.
3Adaptability or versatility
If more integrated circuit processors are added, then capability increases, but size and complexity increase
Solution Approach 1:
The patent segments the processor module into multiple independent interposer dies, each capable of supporting processors. This segmentation allows the system to scale capability by adding more dies rather than increasing the size of individual components, thereby managing complexity through modularity.
Solution Approach 2:
The patent transitions from a single-plane interposer architecture to a multi-layer three-dimensional structure with interposer dies stacked and connected through bridges. This vertical integration in the third dimension allows increased processor capability without proportional increases in lateral footprint or system complexity.
4Manufacturing precision
If active interposers are used around the core, then connectivity is improved, but heat dissipation becomes challenging
Solution Approach 1:
The patent applies different functional qualities to different regions of the interposer structure. Active interposers with full functionality are placed around the core where connectivity is needed, while passive interposers are positioned beneath the core specifically for heat dissipation. This spatial differentiation of function resolves the contradiction between connectivity and thermal management.
Solution Approach 2:
The patent introduces passive interposers as intermediary elements between the active core and the heat sink. These passive interposers act as thermal conduits that facilitate heat flow from the active components to the cooling structure, enabling effective heat dissipation without compromising the connectivity provided by active interposers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables increased density and scalability of processor modules by one to two orders of magnitude, enhancing computational capacity and reducing manufacturing costs through efficient die partitioning and heat management.
Implementation Method 1
Interposers with vias are used to establish connectivity between bump mounted solder components and copper-to-copper mounted integrated circuit components
Implementation Method 2
Active interposers may be disposed around the edge of the core with passive interposers beneath the core to facilitate heat dissipation
Data Source
AI summary
An interposer, and integrated circuit including an interposer, has a lower surface adapted for bump mounting and an upper surface adapted for copper bonding. An interposer layer includes active interposers and passive interposers. Bridges connect interposers in the interposer layer to produce a functionally large interposer from smaller interposer dies. A core may overlap more than one interposer in the interposer layer. Active interposers are disposed around the edge of the core with passive interposers beneath the core to facilitate heat dissipation.