Copper Interconnect Cap Layer Recess for Electromigration
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Solution Overview
Problem
Advanced integrated circuits face premature failure due to electromigration-induced stress and mass transport in copper-based interconnects, particularly at high current densities, where voids and hillocks form, reducing performance and reliability, and existing barrier layers and cap materials may increase series resistance and damage copper.
Innovation Solution
A method involving sputter processes to form controlled recesses in conductive cap layers and barrier layers within via openings, reducing material at the via bottom and maintaining copper integrity, while avoiding aggressive etch techniques, to enhance electromigration performance and reduce series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conductive cap layer is formed to improve electromigration performance, then reliability is improved, but series resistance increases
Solution Approach 1:
The patent applies local quality by forming the conductive cap layer selectively only at the via bottom where it is most needed for electromigration resistance, rather than uniformly across the entire interconnect. The cap layer is deposited conformally and then planarized to expose the metal line topography, creating a localized reinforcement zone that provides electromigration protection at critical stress points while minimizing overall resistance impact.
2Reliability
If barrier layers are formed to prevent copper diffusion, then reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the barrier layer formation with the conductive cap layer deposition by using the same sputtering process for both. The barrier layer is deposited first, then the conductive cap layer is deposited conformally over it in the same chamber without breaking vacuum, combining two critical functions into a single integrated process step that reduces overall manufacturing complexity.
3Productivity
If feature sizes are reduced to increase circuit density, then productivity is improved, but electromigration effects worsen
Solution Approach 1:
The patent applies parameter changes by modifying the physical and chemical properties of the cap layer material to create a composition that is specifically resistant to electromigration. The cap layer uses a controlled deposition process that adjusts material density, grain structure, and composition to optimize resistance against stress-induced mass transport, allowing smaller features to maintain reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the controllability and reliability of copper-based interconnects by reducing series resistance and maintaining copper integrity, enhancing electromigration performance without increasing process complexity, suitable for scaled devices like the 65 nm technology node and beyond.
Implementation Method 1
performing a first sputter process to remove material from the bottom of the opening so as to form a recess in the conductive cap layer
Data Source
AI summary
By appropriately designing a plurality of deposition steps and intermediate sputter processes, the formation of a barrier material within a via opening may be accomplished on the basis of a highly efficient process strategy that readily integrates conductive cap layers formed above metal-containing regions into well-approved process sequences.