Copper Carrier Substrate for Semiconductor Wafer Thermal Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor packages face challenges in effective heat dissipation and mechanical strength due to the presence of encapsulation layers and high thermal impedance, leading to warpage and inefficiencies in thermal management.
Innovation Solution
A wafer level packaging process where a copper carrier substrate with high thermal conductivity is bonded directly to the semiconductor wafer, serving as both a heat spreader and mechanical support, reducing warpage and improving adhesion strength through ionic bonding and self-annealing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an encapsulation layer is used to protect the semiconductor device, then reliability is improved, but heat dissipation performance deteriorates due to high thermal impedance
Solution Approach 1:
The patent removes the traditional encapsulation layer (mold compound) from the semiconductor package structure and replaces it with a copper carrier substrate that provides both mechanical protection and thermal management functions, eliminating the thermal barrier caused by encapsulation materials
Solution Approach 2:
The copper carrier substrate serves multiple functions simultaneously: it acts as a mechanical support structure, a heat spreader for thermal management, and a protective enclosure replacement, thereby eliminating the need for separate encapsulation layers
2Temperature
If a copper carrier substrate is used for heat dissipation, then thermal conductivity is improved, but manufacturing complexity increases due to direct bonding requirements
Solution Approach 1:
The copper carrier substrate undergoes self-annealing when placed in a furnace during subsequent manufacturing steps, automatically forming strong metallurgical bonds with the semiconductor die without requiring separate bonding equipment or complex processing steps
3Volume of moving object
If the semiconductor wafer is thinned to reduce package size, then compactness is improved, but mechanical strength deteriorates leading to warpage
Solution Approach 1:
The copper carrier substrate acts as a rigid support backbone that counteracts the mechanical weakness of thinned semiconductor wafers, preventing warpage and providing structural integrity while allowing the wafer to be thinned for compact packaging
4Ease of manufacture
If traditional encapsulation materials are used, then ease of manufacture is improved, but adhesion strength deteriorates causing delamination and interface cracking
Solution Approach 1:
The patent uses a copper-carbon composite structure where the copper carrier substrate provides strong metallurgical bonding to the semiconductor die, while a carbon-based encapsulation material provides protective encapsulation, creating a composite structure with superior adhesion strength that eliminates delamination and interface cracking
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances thermal dissipation and mechanical reliability, reducing the risk of delamination and interface cracking, allowing for larger package sizes and improved shock protection while eliminating the need for additional adhesives.
Implementation Method 1
a copper carrier substrate with high thermal conductivity is bonded directly to the semiconductor wafer, serving as both a heat spreader
Implementation Method 2
improving adhesion strength through ionic bonding and self-annealing processes
Implementation Method 3
improving adhesion strength through ionic bonding and self-annealing processes
Data Source
AI summary
Disclosed is a method of manufacturing a semiconductor device that includes securing a lower surface of a wafer to a supporting surface of a carrier substrate formed of copper or other metal having good thermal conductance. Further semiconductor processing for packaging can include forming an RDL on the wafer, etching scribe channels through the wafer, and coating the wafer with encapsulant. After dicing, the metal carrier remains in contact with and supporting the lower surface of the wafer, and the remainder of the wafer remains coated by the encapsulant.


