Copper Foil Package Structure for Flat LED Substrate Pads
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The fabrication process of micro and mini LED substrates often results in uneven metal pads due to dielectric layers and electroplating, leading to unreliable assembly and reduced product reliability.
Innovation Solution
A manufacturing method involving a copper foil layer laminated on a carrier, followed by a subtractive process to form a copper foil circuit layer, and subsequent build-up structure layers, allowing for controlled flatness and coplanarity, enabling reliable assembly of electronic components with improved yield and reduced production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a liquid or dry film type material is used as a dielectric layer and a subsequent electroplating process is performed, then the dielectric layers can be built up, but the surface of the formed metal pads becomes uneven
Solution Approach 1:
The patent inverts the conventional build-up process by using a subtractive approach instead of additive. A copper foil layer is laminated on the carrier and then selectively removed through etching to form the copper foil circuit layer, rather than building up metal pads through electroplating. This inversion fundamentally changes the process from creating metal structures to removing material, thereby achieving the required surface flatness while maintaining ease of manufacture.
2Ease of manufacture
If conventional electroplating processes are used to form metal pads, then the dielectric layers can be built up, but the assembly of micro LEDs or mini LEDs becomes unreliable
Solution Approach 1:
The patent replaces the conventional additive electroplating process with a subtractive etching process. By laminating a copper foil layer and selectively removing portions through etching, the method achieves precise metal pad formation with excellent surface flatness, enabling reliable assembly of micro LEDs or mini LEDs while maintaining ease of manufacture through the simplified process flow.
3Reliability
If surface flatness requirements are strictly enforced, then assembly reliability improves, but the fabrication process becomes more complex
Solution Approach 1:
The patent simplifies the fabrication process by inverting the conventional approach: instead of building up metal pads through complex electroplating processes and then attempting to achieve surface flatness, the method laminates a copper foil layer and selectively removes material through etching. This subtractive approach inherently produces the required surface flatness with fewer process steps, thereby improving assembly reliability while reducing fabrication process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves better structural reliability and surface coplanarity of less than 2 μm, enhancing the yield of electronic component docking and simplifying the fabrication process while reducing production costs.
Implementation Method 1
performing a laser removal process to remove the substrate to expose the release film
Data Source
AI summary
A manufacturing method of a package structure is provided, which includes the following steps. A carrier having a surface is provided. A copper foil layer is laminated on the surface of the carrier. A subtractive process is performed on the copper foil layer to form a copper foil circuit layer on the carrier. The copper foil circuit layer exposes a part of the surface of the carrier. A build-up structure layer is formed on the copper foil circuit layer and the surface of the carrier. A first surface of the copper foil circuit layer is aligned with a second surface of the build-up structure layer. At least one electronic component is disposed on the build-up structure layer. A package colloid is formed to cover the electronic component and the build-up structure layer. The carrier is removed to expose the first surface of the copper foil circuit layer.