Copper Gap Fill via Electroless Seed Layer for Void Prevention
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Solution Overview
Problem
Copper interconnects in semiconductor devices with high aspect ratios often exhibit pinhole-like voids when filled using electrochemical copper plating (ECP), leading to yield loss and reliability concerns during electromigration testing, while electroless copper plating is costly and low-throughput.
Innovation Solution
A method combining electroless copper plating to reduce the aspect ratio of gaps to prevent pinhole-like voids, allowing for efficient and economic completion with ECP, involving a blanket conformal metal barrier layer, electroless copper seed layer, partial filling of deeper gaps, and subsequent ECP to fill the gaps without voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If electrochemical copper plating (ECP) is used to fill gaps with high aspect ratios, then the filling process is efficient and economic, but pinhole-like voids form in the copper leading to yield loss and reliability concerns
Solution Approach 1:
The patent applies preliminary action by first forming a copper seed layer through electroless copper plating before performing ECP. This preliminary electroless plating creates a nucleation layer that enables subsequent ECP to proceed without forming pinhole voids, even in high aspect ratio gaps. The seed layer is formed in advance to prepare the gap surfaces for effective ECP filling.
Solution Approach 2:
The patent segments the copper filling process into two distinct stages: first, electroless copper plating to form a seed layer and partially fill the gaps; second, ECP to complete the filling. This segmentation allows each process to perform its optimal function - electroless plating provides reliable nucleation and initial coverage, while ECP provides efficient bulk filling without voids.
2Reliability
If electroless copper plating is used to fill gaps, then good gap filling and adhesion properties are achieved, but the process is high-cost and low-throughput
Solution Approach 1:
The patent applies partial action by using electroless copper plating only to the extent necessary - specifically, to form a seed layer of sufficient thickness to enable ECP and partially fill deeper portions of high aspect ratio gaps. The electroless plating is not used to complete the entire filling process, but only to the degree required to prepare for efficient ECP completion, thereby minimizing cost and time while achieving the desired quality.
3Reliability
If the copper seed layer thickness is increased to prevent pinhole voids in ECP filled gaps, then gap filling quality improves, but the amount of copper deposited increases and processing time extends
Solution Approach 1:
The patent applies parameter changes by carefully controlling the electroless plating conditions (such as solution composition, temperature, and plating time) to achieve the minimum necessary seed layer thickness that enables void-free ECP. By optimizing these parameters, the seed layer is formed with sufficient quality to prevent pinholes while minimizing the time and material required for this preliminary step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively fills gaps with copper in semiconductor devices, reducing pinhole-like voids and minimizing the high cost and low throughput of electroless copper plating, while ensuring efficient and economic processing, even for high aspect ratio gaps.
Implementation Method 1
submerged in a solution to electroless plate a blanket conformal copper seed layer
Implementation Method 2
ECP, electro copper plating, process traditionally accomplishes filling of the gaps with copper
Data Source
AI summary
A method of filling gaps in dielectric layers is disclosed. A wafer is provided having a dielectric layer containing gaps to be filled with copper, some of the gaps, denoted deeper gaps, having aspect ratios so large that filling these gaps with copper using ECP could result in pinhole like voids. A blanket conformal metal barrier layer is formed and the wafer is then submerged in a solution to electroless plate a blanket conformal copper seed layer. A partial filling of deeper gaps with copper reduces the effective aspect ratios of the deeper gaps to the extent that ECP could be used to complete the copper filling of the gaps without forming pinhole like voids. ECP is then used to complete the copper filling of the gaps. The wafer is annealed and CMP performed to planarize the surface, giving rise to a structure in which the gaps are filled with copper and are separated by the dielectric layer.