Copper Halide Semiconductor Device for High Power

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Solution Overview

Problem

Silicon-based semiconductor devices have a small band gap, making them unsuitable for high-power applications, and GaN-based devices using sapphire or silicon carbide substrates are costly and limit productivity due to lattice mismatch and high internal fields, reducing charge mobility.

Innovation Solution

A copper halide semiconductor-based electronic device is developed, featuring a copper halide channel layer on a substrate with insulating and barrier layers, incorporating n-type or p-type impurities, which allows for high-bandgap operation without expensive substrates, enhancing productivity and reducing production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If GaN-based semiconductor devices use sapphire or silicon carbide substrates to achieve high-power and high-speed performance, then power and speed are improved, but manufacturing cost increases and productivity decreases

Engineering Contradiction:
ImprovepowerVSAvoidmanufacturing cost
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent replaces expensive sapphire or silicon carbide substrates with inexpensive silicon substrates for growing GaN/AlGaN high electron mobility transistor structures. This substitution dramatically reduces manufacturing cost while maintaining the high-power and high-speed performance through proper structural design including AlGaN barrier layers and quantum well structures.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Power

If GaN-based semiconductor devices use sapphire or silicon carbide substrates to achieve high-power and high-speed performance, then power and speed are improved, but productivity decreases due to small substrate size

Engineering Contradiction:
ImprovepowerVSAvoidproductivity
Core Design Contradiction:
PowerVSProductivity

Solution Approach 1:

The patent enables the use of large-area silicon substrates instead of limited-size sapphire or silicon carbide substrates. This allows multiple devices to be grown on a single substrate, significantly increasing productivity while maintaining high-power performance through the AlGaN/GaN heterostructure design.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Power

If GaN/AlGaN layer is used with high lattice mismatch to substrate, then high-power performance is achieved, but internal fields increase reducing charge mobility

Engineering Contradiction:
ImprovepowerVSAvoidcharge mobility
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The patent introduces AlGaN barrier layers with specific thickness and composition ratios at critical interfaces within the GaN/AlGaN heterostructure. These localized AlGaN layers with optimized properties reduce internal piezoelectric and spontaneous polarization fields at interfaces, thereby improving charge mobility in the active region while maintaining high-power capability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite AlGaN/GaN heterostructure with multiple layers having different aluminum compositions. The AlGaN barrier layers with controlled Al content create a composite structure that manages lattice mismatch and reduces internal fields, enabling both high-power performance and high charge mobility through the combined properties of different layers.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS10566427B2Copper halide semiconductor based electronic devices
Publication Date: 2020.02.18 PETALUX INC
  • US10566427B2 patent drawing
  • US10566427B2 patent drawing
  • US10566427B2 patent drawing

AI summary

A high output and high speed electronic device having low cost and high productivity is disclosed. The copper halide semiconductor based electronic device, includes a substrate, a copper halide channel layer formed on the substrate, an insulating layer formed on the copper halide channel layer, a gate electrode formed on the insulating layer, a first n+copper halide layer formed on the copper halide channel layer to be disposed at a first side of the gate electrode, the first n+copper halide layer comprising n-type impurities, a drain electrode formed on the first n+copper halide layer, a second n+copper halide layer formed on the copper halide channel layer to be disposed at a second side of the gate electrode, which is opposite to the first side, the second n+copper halide layer comprising n-type impurities, and a source electrode formed on the second n+copper halide layer.