Metal Alloy Capping Layer for Copper Interconnect Resistivity
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Solution Overview
Problem
Copper interconnects in semiconductor devices face electromigration-induced void growth and electrical resistivity increases due to residual alloy elements, which lead to circuit failures and increased electrical resistivity, posing challenges in enhancing signal speed and reducing crosstalk.
Innovation Solution
A metal interconnect structure with a metal alloy capping layer that diffuses and segregates onto the surface of copper, avoiding physical contact with sidewalls, thereby reducing electrical resistivity and minimizing alloy element presence within the interconnect features, and a reflow annealing process to ensure sufficient distribution of the alloying element along the copper-dielectric interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal alloy capping layer is deposited to resist electromigration, then electromigration resistance is improved, but electrical resistivity increases due to residual alloy elements
Solution Approach 1:
The patent extracts the harmful alloy elements from the copper interconnect by using a capping layer that segregates alloy elements to the interface region, effectively removing them from the bulk copper conductor where they would increase electrical resistivity
Solution Approach 2:
The patent applies local quality by creating a concentrated alloy layer at the copper-dielectric interface while maintaining pure copper in the bulk interconnect region. This localized segregation provides electromigration resistance at the interface without compromising the electrical conductivity of the main copper conductor
2Reliability
If alloy elements are added to enhance electromigration resistance, then reliability is improved, but manufacturing complexity increases due to additional processing steps
Solution Approach 1:
The patent merges the capping layer deposition with the existing interconnect fabrication process by using electroless plating, which combines chemical and physical deposition mechanisms in a single step, eliminating the need for separate pre-cleaning and post-cleaning processes
Solution Approach 2:
The electroless plating process is self-service in that it automatically segregates alloy elements to the interface region through thermodynamic driving forces during the deposition process itself, without requiring additional post-processing steps to achieve the desired alloy distribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces electromigration-induced void growth and electrical resistivity, enhancing the reliability of copper interconnects while maintaining low electrical resistance and minimizing crosstalk, thus improving the performance and longevity of semiconductor devices.
Implementation Method 1
The originally deposited alloy capping layer element within the interconnect features will diffuse into and segregate onto top surface of the metal interconnect
Implementation Method 2
The originally deposited alloy capping layer element within the interconnect features will diffuse into and segregate onto top surface of the metal interconnect
Implementation Method 3
a second reflow annealing of the deposited metal alloy capping material on the pure copper enables sufficient amount of the metal alloy into the patterned features
Data Source
AI summary
A metal interconnect structure, which includes metal alloy capping layers, and a method of manufacturing the same. The originally deposited alloy capping layer element within the interconnect features will diffuse into and segregate onto top surface of the metal interconnect. The metal alloy capping material is deposited on a reflowed copper surface and is not physically in contact with sidewalls of the interconnect features. The metal alloy capping layer is also reflowed on the copper. Thus, there is a reduction in electrical resistivity impact from residual alloy elements in the interconnect structure. That is, there is a reduction, of alloy elements inside the features of the metal interconnect structure. The metal interconnect structure includes a dielectric layer with a recessed line, a liner material on sidewalls, a copper material, an alloy capping layer, and a dielectric cap.