Copper Interconnect Anti-Diffusion Layers for Solid State Imaging

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Solution Overview

Problem

Solid state imaging apparatuses using copper interconnects face issues with copper diffusion into the substrate, leading to increased dark current and white blemishes, as well as light leakage due to interconnect thickness variations and dishing phenomena.

Innovation Solution

The implementation of a copper-containing interconnect layer with first and second anti-diffusion layers to prevent copper diffusion, combined with a stress-relieving film and a light-shielding interconnect layer to reduce dark current and white blemishes, and improve light-shielding efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper interconnects are used to reduce resistance and improve high-speed operation, then electrical performance is improved, but copper diffusion into the substrate occurs causing increased dark current and white blemishes

Engineering Contradiction:
Improveelectrical performanceVSAvoidcopper diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A barrier metal layer is introduced as an intermediary between the copper interconnect and the semiconductor substrate. This barrier layer prevents copper atoms from diffusing into the substrate while maintaining electrical conductivity, thereby eliminating dark current and white blemishes caused by copper contamination.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The interconnect structure is designed as a composite material system consisting of multiple layers including copper interconnect, barrier metal layer, and capping layer. Each layer serves specific functions: copper provides low resistance, barrier metal prevents diffusion, and capping layer provides mechanical protection and stress relief.

Inventive Principle:
Principle #40Composite materials

2Reliability

If copper interconnects are used to reduce resistance, then electrical performance is improved, but dishing phenomena occur causing interconnect thickness variations and light leakage

Engineering Contradiction:
Improveelectrical performanceVSAvoidinterconnect thickness uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The capping layer is designed with specific thickness parameters (50-200 nm) and material properties to compensate for dishing effects. By controlling the capping layer thickness and using appropriate materials, the overall interconnect structure maintains uniform effective thickness despite underlying dishing in the copper layer.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The capping layer is applied beforehand to the copper interconnect structure to cushion and compensate for potential dishing phenomena during subsequent CMP processing. This pre-protection layer ensures that the final interconnect structure maintains uniform thickness and prevents light leakage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Object-generated harmful factors

If multiple anti-diffusion layers are added to prevent copper diffusion, then copper contamination is reduced, but device structure complexity increases

Engineering Contradiction:
Improvecopper diffusionVSAvoidlayer structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The barrier metal layer is selectively applied only in regions where copper diffusion is a concern, such as at the interfaces between copper interconnect and semiconductor substrate. This localized approach provides effective diffusion protection while minimizing the addition of structural complexity to areas where it is not needed.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces dark current and white blemishes, enhances light-shielding reliability, and maintains interconnect layer integrity, resulting in improved image quality and performance for solid state imaging devices.

Implementation Method 1

copper diffusion into the substrate, leading to increased dark current and white blemishes

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

film stress produced between the first anti-diffusion layer and the photoelectric conversion section

Methodology Applied
Scientific EffectFilm stress: Stress Relaxation

Data Source

PatentUS8115241B2Solid state imaging apparatus and method for fabricating the same
Publication Date: 2012.02.14 GODO KAISHA IP BRIDGE 1
  • US8115241B2 patent drawing
  • US8115241B2 patent drawing
  • US8115241B2 patent drawing

AI summary

A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.