Copper Interconnect Grain Structure Control via Substrate Stress
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Solution Overview
Problem
As feature sizes of integrated circuits decrease below 45 nm node technology, copper interconnects with bamboo and columnar grain structures become difficult to achieve, leading to increased electromigration effects, which are exacerbated by the formation of 'gravel defects' during annealing, compromising the reliability of copper interconnects.
Innovation Solution
Applying a force to the semiconductor material to induce stress within the copper deposited in trenches, facilitating recrystallization and grain growth into bamboo and columnar grain structures, thereby reducing electromigration effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional annealing is performed on copper interconnects below 45 nm node technology, then copper deposition is simplified, but gravel defects form and electromigration performance deteriorates
Solution Approach 1:
The patent applies force to the semiconductor substrate before copper deposition to pre-establish stress conditions. This preliminary action ensures that when copper is deposited and subsequently annealed, the stress field is already in place to guide grain growth toward columnar structures, preventing gravel defect formation while maintaining process simplicity
Solution Approach 2:
The patent changes the physical state of the substrate by applying mechanical force, which induces stress as a new parameter. This stress parameter then influences the copper grain growth behavior during annealing, transforming the grain structure from random (gravel) to oriented (columnar), thereby improving electromigration performance without complicating the deposition process
2Productivity
If feature sizes are reduced below 45 nm node technology, then device integration density increases, but achieving bamboo and columnar grain structures becomes difficult and electromigration increases
Solution Approach 1:
The patent applies force locally to specific regions of the substrate where copper interconnects are formed. This creates localized stress fields that guide grain growth in those specific areas, enabling columnar grain structure formation even in sub-45 nm features where conventional uniform annealing fails to produce reliable grain structures
3Reliability
If force is applied to induce stress in copper during annealing, then recrystallization and grain growth into bamboo and columnar structures is facilitated, but process complexity increases
Solution Approach 1:
The patent uses the substrate as an intermediary to transmit force to the copper layer. Rather than applying force directly to the copper (which would require complex positioning and application mechanisms), the substrate acts as a mediator that distributes the force uniformly, simplifying the force application mechanism while still achieving the desired stress-induced columnar grain growth
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively forms copper interconnects with decreased electromigration, enhancing device performance by promoting the formation of desired grain structures even at smaller node technologies.
Implementation Method 1
A force is applied to the semiconductor material and stress is induced within the copper deposited in the trench. Recrystallization and grain growth are effected within the copper and the force is removed.
Implementation Method 2
Electromigration is the diffusion of copper caused by the gradual movement of copper ions due to the momentum transfer between conducting electrons and diffusing copper atoms.
Data Source
AI summary
Methods for forming copper interconnects for semiconductor devices are provided. In an exemplary embodiment, a method for forming a copper interconnect comprises depositing copper into a trench formed in a dielectric material overlying a semiconductor material. A force is applied to the semiconductor material and stress is induced within the copper deposited in the trench. Recrystallization and grain growth are effected within the copper and the stress is removed.