Copper Interconnect Liner Doping for Thin Barrier Gap Fill
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Solution Overview
Problem
The fabrication of copper interconnects in silicon integrated circuits faces challenges such as gap-fill and high resistance issues when scaled down to sub-10 nm critical dimension, due to the minimum thickness requirements of barrier and liner layers, leading to reduced adhesion and increased electron scattering.
Innovation Solution
A method involving plasma-assisted implantation of metal dopants into the underlying liner and/or barrier layers to improve adhesion of the metal interconnects, which includes depositing a barrier layer, performing a metal treatment to implant dopants into the barrier layer, depositing a liner layer, another metal treatment for the liner layer, and finally a gap fill process to form the metal interconnect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier layer and liner layer thickness are increased to prevent copper diffusion and enhance adhesion, then reliability improves, but device critical dimension shrinks and resistivity increases
Solution Approach 1:
The patent applies selective metal dopant implantation at specific locations within the barrier and liner layers. By creating localized regions with modified composition and properties rather than uniformly thickening the layers, the invention achieves improved adhesion and reduced electron scattering without increasing overall layer thickness or reducing critical dimension.
Solution Approach 2:
The invention changes the physical and chemical parameters of the barrier and liner layers by implanting metal dopants. This modifies the electrical and mechanical properties of the layers, reducing electron scattering and improving adhesion while maintaining the original layer thickness and critical dimensions.
2Manufacturing precision
If barrier layer thickness is reduced to maintain critical dimension, then device scaling improves, but copper diffusion into dielectric layer increases
Solution Approach 1:
Instead of uniformly thickening the barrier layer, the patent introduces localized regions of metal dopants within the barrier layer. These dopant-rich regions create localized barriers to copper diffusion, allowing the overall barrier layer to remain thin while still preventing copper migration into the dielectric.
Solution Approach 2:
The metal dopants act as intermediary elements between the copper interconnect and the dielectric layer. These dopants create a transition zone that impedes copper diffusion while maintaining the thin barrier layer structure needed for device scaling.
3Reliability
If interface area between copper interconnect and barrier/liner layer is increased to improve adhesion, then reliability improves, but electron scattering increases and resistivity increases
Solution Approach 1:
The patent modifies the electrical parameters of the barrier and liner layers by implanting metal dopants. This changes the electrical conductivity and electron scattering characteristics of the layers, reducing resistivity while simultaneously improving adhesion through compositional modification.
Solution Approach 2:
The invention creates composite structures by incorporating metal dopants into the barrier and liner layers. This results in composite materials that combine the diffusion barrier properties of the original layers with the adhesion-enhancing and conductivity-improving properties of the dopanted regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances adhesion between the metal interconnects and the liner/barrier layers, reduces liner agglomeration, improves gap fill capability, and increases device reliability by suppressing interface electron scattering.
Implementation Method 1
performing a metal treatment process to implant metal dopants into a surface of the liner layer
Data Source
AI summary
A method of forming a metal interconnect in a semiconductor structure includes performing a barrier layer deposition process to deposit a barrier layer within an opening formed through a dielectric layer, performing a liner deposition process to deposit a liner layer on the barrier layer, performing a metal treatment process to implant metal dopants into a surface of the liner layer, and performing a gap fill process to form a metal interconnect on the metal treated surface of the liner layer within the opening.