Reversed-Profile Copper Pillars for Dense InFO I/O Redistribution
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Solution Overview
Problem
As semiconductor chips become smaller and more functional, integrating a greater number of I/O pads into smaller areas complicates packaging, leading to yield issues due to increased difficulty in redistributing connections effectively.
Innovation Solution
The development of an Integrated Fan-Out (InFO) package process involving the formation of copper pillars with a reversed profile, where a polymer layer is reflowed to reduce stress and improve contact with metal pads, and redistribution lines are formed to connect I/O pads across a larger area without increasing the die size, using techniques like single and dual damascene processes and specific baking temperatures to control reflow and tilt angles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of I/O pads is increased to integrate more functions, then the functionality of semiconductor chips is improved, but the packaging difficulty increases and yield decreases
Solution Approach 1:
The patent transitions from planar 2D pad layout to 3D vertical copper pillar structures with reversed profiles. The copper pillars extend vertically from the substrate with enlarged top surfaces, utilizing the third dimension to increase connection density without expanding the chip footprint, thereby enabling more I/O pads in limited area while simplifying packaging.
Solution Approach 2:
The patent divides the chip structure into distinct functional layers: substrate, copper pillars, encapsulating material, and redistribution lines. This segmentation allows independent optimization of each layer, with copper pillars providing vertical connections and redistribution lines handling lateral routing, thereby simplifying the overall packaging process while maintaining high I/O density.
2Quantity of substance
If the area of device die is increased to accommodate more I/O pads, then the I/O pad density is improved, but the die size increases which is not desirable
Solution Approach 1:
The patent employs vertical copper pillars with enlarged top surfaces that protrude through the encapsulating material. This vertical dimensionality allows multiple I/O connections to be stacked within the same footprint area, achieving high I/O pad density without increasing die size. The reversed profile copper pillars provide both mechanical support and electrical connection in the vertical direction.
Solution Approach 2:
The patent implements a nested structure where copper pillars are embedded within the substrate and extend through encapsulating material, with redistribution lines nested around the copper pillars. This nested arrangement maximizes space utilization, allowing multiple functional elements to occupy overlapping spatial volumes, thereby increasing I/O density without expanding die area.
3Reliability
If polymer layer is reflowed to improve contact with metal pads, then the stress is reduced and contact reliability is improved, but the process complexity increases
Solution Approach 1:
The patent utilizes controlled reflow processing that changes the physical parameters of the polymer layer (temperature, viscosity, flow behavior) to improve its conformal contact with the reversed profile copper pillars. By carefully controlling the reflow temperature and duration, the polymer material flows into the contours of the copper pillars, creating enhanced mechanical interlocking and electrical contact without requiring overly complex processing equipment or multiple steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances packaging efficiency by reducing stress and delamination risks, allowing for reliable electrical connections and increased I/O pad density without area expansion, thereby improving yield and integration capabilities.
Implementation Method 1
a polymer layer is reflowed to reduce stress and improve contact with metal pads
Data Source
AI summary
A method includes forming a first polymer layer to cover a metal pad of a wafer, and patterning the first polymer layer to form a first opening. A first sidewall of the first polymer layer exposed to the first opening has a first tilt angle where the first sidewall is in contact with the metal pad. The method further includes forming a metal pillar in the first opening, sawing the wafer to generate a device die, encapsulating the device die in an encapsulating material, performing a planarization to reveal the metal pillar, forming a second polymer layer over the encapsulating material and the device die, and patterning the second polymer layer to form a second opening. The metal pillar is exposed through the second opening. A second sidewall of the second polymer layer exposed to the second opening has a second tilt angle greater than the first tilt angle.