Copper Via Bonding Structure for Electromigration-Resistant Interconnects

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Solution Overview

Problem

Existing semiconductor bonding methods are prone to breaking due to electromigration, particularly because of constraints on current density and the difficulty in micromachining diffusion-preventing films, leading to void generation and wire failure.

Innovation Solution

The semiconductor apparatus incorporates a wiring structure with specific via configurations and material combinations, including copper and barrier metals, where the second via is positioned at a distance from the axis of the first via, and the second wiring layer is thinner than the first via, with a different material layer between the vias to prevent copper diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a copper bonding pad is used for bonding to achieve high conductivity, then electrical performance is improved, but electromigration of metal atoms causes wire breaking

Engineering Contradiction:
Improvebonding reliabilityVSAvoidelectromigration
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent uses a composite wiring structure with multiple materials: copper wiring layers (first and second wiring layers) for high conductivity, and a barrier metal layer (third wiring layer) made of materials like tungsten or tantalum to prevent electromigration. This composite structure combines the advantages of copper's conductivity with the barrier metal's resistance to electromigration, solving the contradiction between electrical performance and reliability.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a diffusion preventing film is made finer to prevent metal atom diffusion, then diffusion prevention is improved, but the bonding part becomes difficult to micromachine

Engineering Contradiction:
Improvediffusion preventionVSAvoidmicromachining difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies different properties to different parts of the wiring structure. The barrier metal layer is strategically positioned only where needed (between the copper wiring layers and the substrate) to prevent diffusion, while the copper wiring layers maintain their conductivity. This localized application of barrier properties solves the contradiction between diffusion prevention and manufacturability.

Inventive Principle:
Principle #3Local quality

3Reliability

If the second wiring layer thickness is reduced to less than the first via width, then void formation due to electromigration is reduced, but the wiring structure becomes more sensitive to processing variations

Engineering Contradiction:
Improvevoid formation resistanceVSAvoidprocessing tolerance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs a multi-layer composite structure where the thin second wiring layer (thickness less than first via width) is protected by the barrier metal layer and supported by the thicker first wiring layer. This composite structure allows the second layer to be thin enough to resist void formation while the overall structure maintains sufficient robustness against processing variations.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the risk of breaking due to electromigration by preventing void formation and enhancing interconnect reliability, while maintaining a compact design without increasing the number of wiring layers.

Implementation Method 1

a layer that is made from a material different from copper is disposed between the first via and the second wiring layer

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS11830902B2Semiconductor apparatus
Publication Date: 2023.11.28 CANON KK
  • US11830902B2 patent drawing
  • US11830902B2 patent drawing
  • US11830902B2 patent drawing

AI summary

A semiconductor apparatus including: a first substrate; a first wiring structure; a second substrate; and a second wiring structure, wherein the first wiring structure has a first wiring layer bonded to wiring of the second wiring structure, a second wiring layer connected to the first wiring layer by a first via, and a third wiring layer connected to the second wiring layer by a second via, at least part of the second via is located at a range distanced, by at least a width of the first via, from an axis of the first via, a thickness of the second wiring layer is less than the width of the first via, a major constituent of the first wiring layer, the second wiring layer and the first via is copper, and a layer that is made from a material different from copper is disposed between the first via and the second wiring layer.