Copper Wiring Cobalt Capping Electromigration

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Solution Overview

Problem

Conventional copper wiring techniques in semiconductor devices lead to decreased electromigration characteristics due to reduced wiring line width, affecting the desired electrical characteristics of high-speed and high-integration semiconductor devices.

Innovation Solution

A method involving the formation of a copper-based conductive layer within a groove on a semiconductor substrate, followed by a cobalt-based capping layer using electroless plating, and subsequent cleansing with basic and acidic solutions to improve electrical characteristics, including the use of chemical mechanical polishing (CMP) and specific cleansing solutions like ethanolamine and oxalic acid to enhance the copper wiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional copper wiring techniques are applied with reduced wiring line width, then high integration degree is achieved, but electromigration characteristics deteriorate

Engineering Contradiction:
Improveintegration degreeVSAvoidelectromigration characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies composite materials by combining copper with other metals (such as cobalt, nickel, or tungsten) to form a copper-based composite conductive layer. This composite structure maintains the high conductivity of copper while adding the strength and electromigration resistance of the other metals, thereby achieving both high integration and reliable electromigration characteristics in reduced wiring line width applications

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the material parameters of the conductive layer by transitioning from pure copper to copper-based composite materials with modified compositional parameters. This parameter change allows the wiring to maintain adequate electromigration resistance even at reduced line widths required for high integration degree semiconductor devices

Inventive Principle:
Principle #35Parameter changes

2Speed

If copper wiring with reduced line width is used for high speed devices, then device speed is improved, but electromigration characteristics decrease

Engineering Contradiction:
Improvedevice speedVSAvoidelectromigration characteristics
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent uses copper-based composite materials that combine the high electrical conductivity of copper (enabling high device speed) with the enhanced electromigration resistance provided by additional metal elements. This composite approach allows reduced line width for high speed performance while maintaining adequate electromigration characteristics through the synergistic material composition

Inventive Principle:
Principle #40Composite materials

3Reliability

If electroless plating is used to deposit cobalt-based capping layer, then copper surface is protected, but plating uniformity may be affected by surface condition

Engineering Contradiction:
Improvecopper surface protectionVSAvoidcapping layer uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing surface preparation and treatment of the copper-based conductive layer before depositing the cobalt-based capping layer through electroless plating. This preliminary surface conditioning ensures uniform nucleation and growth of the capping layer, achieving both protective functionality and manufacturing precision in terms of layer uniformity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method improves electromigration characteristics and reduces leakage current, resulting in higher breakdown voltages and enhanced reliability and performance of semiconductor devices.

Implementation Method 1

depositing a cobalt-based capping layer on the copper-based conductive layer by electroless plating

Methodology Applied
Scientific EffectElectroless plating: Electroplating

Implementation Method 2

removing a portion of the preliminary copper-based conductive layer by a chemical mechanical polishing (CMP) method

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS8021980B2Methods of manufacturing semiconductor devices including a copper-based conductive layer
Publication Date: 2011.09.20 SAMSUNG ELECTRONICS CO LTD
  • US8021980B2 patent drawing
  • US8021980B2 patent drawing
  • US8021980B2 patent drawing

AI summary

Provided are methods of manufacturing semiconductor devices. The methods may include forming a first insulation layer on a semiconductor substrate, forming a groove by selectively etching the first insulation layer, filling the groove with a copper-based conductive layer, depositing a cobalt-based capping layer on the copper-based conductive layer by electroless plating, and cleansing the first insulation layer and the cobalt-based capping layer using a basic cleansing solution.