Hardware Asynchronous Events for Coprocessor Coordination

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Solution Overview

Problem

Traditional methods for coordinating coprocessors, such as interrupts and polling, lead to suboptimal system throughput, idling of CPU or coprocessors, and prevent flexible interaction among coprocessors, resulting in underutilization and increased costs due to 'dark silicon' and latency issues.

Innovation Solution

The implementation of hardware-supported asynchronous events, where coprocessors receive event descriptors to configure and detect events, enabling decentralized flow control and coordination through event bitmaps and global event distributors, allowing peer-to-peer coordination and efficient resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If centralized control by CPU is used to orchestrate coprocessors, then coordination is simplified, but system throughput decreases due to CPU or coprocessor idling

Engineering Contradiction:
Improvecoordination simplicityVSAvoidsystem throughput
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent segments the centralized control function into distributed event management across multiple coprocessors. Each coprocessor maintains its own event queue and can independently process events, eliminating the bottleneck of centralized CPU control while maintaining coordination through shared event queues and synchronization mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces event queues and event descriptors as intermediary structures between coprocessors. These intermediaries enable asynchronous communication and coordination without requiring direct CPU intervention, allowing coprocessors to exchange information and synchronize operations independently.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If interrupts are used for coprocessor coordination, then real-time notification is achieved, but critical section enforcement is complicated and atomicity is compromised

Engineering Contradiction:
Improvenotification speedVSAvoidcritical section atomicity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent replaces the traditional interrupt mechanism with an event-driven approach using event descriptors and event queues. This substitution eliminates the need for interrupt handlers that compromise atomicity, while maintaining real-time notification capabilities through hardware-supported event detection and asynchronous processing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If polling is used for coprocessor coordination, then simple implementation is achieved, but system efficiency decreases significantly

Engineering Contradiction:
Improveimplementation simplicityVSAvoidsystem efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent replaces continuous polling with periodic event-driven actions. Coprocessors are notified of events asynchronously, and processing occurs only when events are detected, eliminating the wasteful continuous polling cycles while maintaining simple event checking mechanisms through event bitmaps and status flags.

Inventive Principle:
Principle #19Periodic action

4Ease of manufacture

If traditional coprocessor coordination models are used, then implementation is straightforward, but flexibility for general purpose software interactions is limited

Engineering Contradiction:
Improveimplementation easeVSAvoidsoftware interaction flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal event descriptor structure that can represent various types of events and coordination patterns. The event queue mechanism serves multiple functions including notification, synchronization, and data exchange, providing flexible interaction patterns that accommodate general purpose software requirements while maintaining straightforward hardware implementation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10599488B2Multi-purpose events for notification and sequence control in multi-core processor systems
Publication Date: 2020.03.24 ORACLE INT CORP
  • US10599488B2 patent drawing
  • US10599488B2 patent drawing
  • US10599488B2 patent drawing

AI summary

Techniques are provided for improving the performance of a constellation of coprocessors by hardware support for asynchronous events. In an embodiment, a coprocessor receives an event descriptor that identifies an event and a logic. The coprocessor processes the event descriptor to configure the coprocessor to detect whether the event has been received. Eventually a device, such as a CPU or another coprocessor, sends the event. The coprocessor detects that it has received the event. In response to detecting the event, the coprocessor performs the logic.