Coprocessor Bitmap Interrupt Aggregation for Multi-Session Processing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data processing systems face challenges in efficiently handling numerous interrupt events, particularly in large-scale scenarios, leading to increased CPU workload and performance degradation due to frequent interactions and repetitive interrupt reporting.

Innovation Solution

A data processing device incorporating a coprocessor that maintains a bitmap table and row validity data to manage interrupt events, reducing interactions with the CPU by using a bitmap table to indicate which sessions require reporting and a row validity data to filter valid rows, and optionally employing a mask table to prevent redundant reports.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the coprocessor reports interrupt events to the CPU for each session individually, then the CPU can handle interrupt events in real-time, but the CPU workload increases and performance degrades due to frequent interactions

Engineering Contradiction:
Improvereal-time interrupt handlingVSAvoidCPU performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple interrupt reports into a single interrupt message by using a bitmap table to aggregate interrupt status across multiple sessions. Instead of the CPU receiving individual interrupt notifications for each session, the coprocessor consolidates them and sends one combined interrupt message containing the bitmap data, thereby reducing CPU workload while maintaining real-time awareness of all interrupt events.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bitmap table acts as an intermediary data structure between the coprocessor and CPU. It stores the interrupt status of multiple sessions in a compact format that can be quickly transferred to the CPU in a single operation, serving as a mediator that reduces the number of direct CPU-coprocessor interactions while preserving complete interrupt information.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If the coprocessor reports all interrupt events to the CPU, then complete interrupt information is provided, but repetitive interrupt reporting occurs increasing the frequency of CPU interactions

Engineering Contradiction:
Improveinterrupt information completenessVSAvoidCPU interaction frequency
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent extracts only the essential interrupt status information from multiple sessions and places it into a compact bitmap table. This extracted representation contains all necessary interrupt information in a condensed format, allowing the CPU to determine which sessions have interrupts without receiving redundant individual interrupt reports for each session.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the representation parameter of interrupt information from individual session-based notifications to a consolidated bitmap structure. This parameter change transforms the data format from multiple separate interrupt events into a single structured message containing bitmapped status information, reducing the frequency of CPU interactions while maintaining information completeness.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250335379A1Data processing device, coprocessor and methods performed thereby
Publication Date: 2025.10.30 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US20250335379A1 patent drawing
  • US20250335379A1 patent drawing
  • US20250335379A1 patent drawing

AI summary

A data processing device includes a central processing unit (CPU), and a coprocessor to perform predetermined tasks for a plurality of sessions, and to report, for at least one session satisfying a predetermined condition, at least one interrupt event to the CPU. The coprocessor maintains a bitmap table and row validity data. The bitmap table indicates, for each of the plurality of sessions, whether there is an interrupt event needing to be reported to the CPU. The row validity data indicates, for each of rows of the bitmap table, whether the row has at least one interrupt event needing to be reported to the CPU. The CPU is configured to, in response to an interrupt signal triggered by the coprocessor, read, from the bitmap table, at least one row that has at least one interrupt event needing to be reported to the CPU, according to the row validity data.