Coprocessor Reset via Reference Space Validation
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Solution Overview
Problem
Existing processor reset methods in computer devices lack flexibility, particularly when a coprocessor needs to be reset independently, as they require simultaneous resetting of all processors on the SoC, leading to issues like static memory access conflicts and incomplete image file validation during the reset process.
Innovation Solution
A method involving a first component obtaining and loading an image file into a reference space in the random-access memory, and a second component validating and releasing a reset signal for the coprocessor, allowing independent reset operations by loading the image file into a specific space, even if the static memory is occupied.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If all processors on the SoC are reset simultaneously according to existing secure boot specifications, then system security is maintained, but the coprocessor cannot operate independently and processing tasks are suspended
Solution Approach 1:
The patent divides the reset operation into separate segments for different processors. The controller can independently reset the coprocessor without resetting the main processor, allowing the coprocessor to be segmented from the global reset operation. This is achieved through separate reset signal control and independent image file validation for the coprocessor.
Solution Approach 2:
The patent introduces dynamic control over reset operations, where the controller can selectively apply reset signals to specific processors based on operational needs. The reset mechanism transitions from a static all-or-nothing approach to a dynamic selective approach, enabling the coprocessor to be reset independently while the main processor continues operating.
2Productivity
If the main processor accesses static memory during coprocessor reset, then memory operations continue, but image file validation fails due to memory access conflicts
Solution Approach 1:
The controller performs preliminary actions by holding the reset signal and completing the image file validation process before actually releasing the reset signal to the coprocessor. This ensures that the coprocessor's image file is fully validated and loaded into memory without interference from concurrent memory access operations by the main processor.
Solution Approach 2:
The controller acts as an intermediary between the main processor and the coprocessor during the reset process. It manages memory access conflicts by coordinating the validation process and controlling the timing of reset signal release, ensuring that image file validation completes successfully even when the main processor is accessing static memory.
3Adaptability or versatility
If the coprocessor is reset while static memory is occupied by the main processor, then independent reset is attempted, but the reset operation cannot complete successfully
Solution Approach 1:
The controller implements feedback control by monitoring the status of memory operations and the validation process before releasing the reset signal. It continuously checks whether the image file validation is complete and whether memory access conflicts have been resolved, and only releases the reset signal when conditions are favorable for successful completion.
Solution Approach 2:
The controller performs preliminary validation of the coprocessor's image file and prepares the reset conditions before actually executing the reset operation. This preliminary action ensures that when the reset signal is released, the coprocessor can complete its reset successfully even if the main processor continues to access static memory.
Data Source
AI summary
Embodiments of the disclosure provide a method for resetting a processor and a computer device. The method includes: obtaining an image file corresponding to a coprocessor by a first component of the computer device, and loading the image file into a reference space in a RAM by the first component; loading the image file stored in the reference space into a specific space corresponding to the coprocessor by a second component of the computer device and validating the image file stored in the specific space by the second component in response to determining that the coprocessor needs to be reset; and resetting the coprocessor by the second component based on the image file stored in the specific space in response to the second component determining that the image file stored in the specific space is valid.