Coprocessor Trace Logging for Low-Overhead Time Travel Debugging

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Solution Overview

Problem

Existing debugging technologies face significant performance impacts due to the high volume of trace data generated during program execution, particularly when using high-fidelity trace recording, which can burden the primary processor and affect application performance.

Innovation Solution

Utilizing a coprocessor to store at least part of the execution trace, where the primary processor sends cache coherency protocol messages over a bus, and the coprocessor records the trace data based on these messages, thereby offloading the logging tasks from the primary processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-fidelity trace recording is used to capture execution data, then measurement precision is improved, but use of energy by moving object increases and productivity decreases

Engineering Contradiction:
Improvetrace data fidelityVSAvoidprocessor energy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system divides the tracing function into two segments: the primary processor generates trace data using high-fidelity recording, while the coprocessor separately handles the storage of this data. This segmentation allows the primary processor to maintain measurement precision without bearing the full energy burden of both generation and storage operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The coprocessor acts as an intermediary component between the primary processor and the trace storage system. It receives trace data from the primary processor via the interconnect bus and handles the storage operations, thereby mediating the energy-intensive data transfer and storage tasks away from the primary processor.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If high-fidelity trace recording is used to capture execution data, then measurement precision is improved, but productivity decreases

Engineering Contradiction:
Improvetrace data fidelityVSAvoidapplication execution performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The tracing workload is segmented between the primary processor and coprocessor. The primary processor focuses on executing application instructions with high-fidelity trace generation, while the coprocessor independently handles trace data storage, preventing productivity degradation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The coprocessor serves as an intermediary that absorbs the productivity impact of trace storage operations. By handling storage tasks separately, it prevents these operations from becoming bottlenecks that would degrade application execution performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If coprocessor is used to store execution trace, then use of energy by moving object is reduced, but device complexity increases

Engineering Contradiction:
Improveprocessor energy consumptionVSAvoidsystem architecture complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The coprocessor is introduced as an intermediary component with a specialized function (trace storage). While this adds a device, it consolidates specific functionality into a dedicated unit, potentially reducing overall system complexity compared to having the primary processor handle all trace operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The coprocessor is designed as a multi-functional unit that can handle various trace storage operations and potentially support multiple primary processors or different tracing modes, amortizing the complexity addition across multiple uses and functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3963459B1Coprocessor-based logging for time travel debugging
Publication Date: 2025.12.24 MICROSOFT TECHNOLOGY LICENSING LLC
  • EP3963459B1 patent drawingFigure 1
  • EP3963459B1 patent drawingFigure 2
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AI summary

A coprocessor stores at least part of an execution trace based on code execution at a primary processor. The coprocessor includes control logic that configures the coprocessor to listen to a bus that interconnects the primary processor and the coprocessor, and to receive one or more cache coherency protocol (CCP) messages from the bus (i.e., CCP message(s) sent on the bus by the primary processor, based on the primary processor having consumed data for a memory cell). Based on receiving the CCP message(s), the coprocessor initiates storing of the consumed data for the memory cell into an execution trace.