Copy-Register Leakage Engine for Side-Channel Attack Obfuscation

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Solution Overview

Problem

Existing cryptographic systems are vulnerable to side-channel attacks (SCA) that exploit physical properties of devices to extract secret keys, such as current draw, voltage fluctuations, and electromagnetic radiation, which current countermeasures are inadequate in masking or hiding sensitive data transfers.

Innovation Solution

Intentionally creating proportional, variable, and biased side-channel leakage by multiplying the leakage value through multiple copy registers to obscure the real key leakage, using configurators to alter leakage patterns and strengths, and synchronizing with sensitive data transfers to confuse attackers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple copy registers are used to multiply leakage values, then side-channel leakage is enhanced to obscure real key leakage, but device complexity increases

Engineering Contradiction:
Improvecryptographic securityVSAvoidnumber of copy registers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates multiple copies of sensitive data in separate register files (first, second, third copy registers) to generate artificial side-channel leakage signals. These copies are processed independently and combined to produce masking leakage that obscures the real key leakage, directly applying the copying principle to enhance security against side-channel attacks.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces random data as an intermediary element that is processed through the copy registers to generate artificial leakage signals. This random data acts as a mediator between the sensitive key and the side-channel output, creating a layer of obfuscation that prevents direct correlation between power consumption and the actual key being protected.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If leakage multiplication is applied to obscure key leakage, then security against side-channel attacks is improved, but power consumption increases

Engineering Contradiction:
Improveprotection against side-channel attacksVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial leakage multiplication by selectively enabling a configurable number of copy registers based on security requirements. The system can adjust the degree of leakage multiplication applied, using only the necessary amount to achieve adequate protection, thereby avoiding excessive power consumption while maintaining sufficient security against side-channel attacks.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements dynamic control over the leakage multiplication process through configurable parameters that allow the system to adjust the number of active copy registers and the degree of masking applied. This dynamic approach enables the system to optimize the balance between security protection and power consumption based on operational conditions and threat levels.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260058790A1Side-Channel Leakage Engine
Publication Date: 2026.02.26 NXP BV
  • US20260058790A1 patent drawing
  • US20260058790A1 patent drawing
  • US20260058790A1 patent drawing

AI summary

A method of operation for a side-channel leakage engine includes initializing a plurality of copy registers with a respective initial value. A respective copied value is copied from a leakage value circuit to at least one of the copy registers, wherein the leakage value circuit comprises a data register comprising a leakage value and each of the copy registers comprises a respective plurality of bits comprising a same number of bits as the data register. An observable characteristic of the side-channel leakage engine is generated, wherein the observable characteristic is proportional to a number of bit transitions of the respective plurality of bits of each of the copy registers, transitioning from the respective initial value to the respective copied value.