CORDIC Arithmetic Apparatus Using Cascade-Connected Units

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Solution Overview

Problem

Conventional CORDIC arithmetic apparatuses have redundant vectoring-mode arithmetic performance, leading to inefficient use of arithmetic resources, particularly in linear algebraic processing of matrices, where rotation-mode operations outnumber vectoring-mode operations.

Innovation Solution

The proposed arithmetic apparatus features cascade-connected arithmetic units with calculators operating in rotation, vectoring, normalization, and division modes, utilizing holding units to store rotational direction information and addition/subtraction determination information, allowing for efficient coordinate rotation calculations with reduced circuit scale.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional CORDIC arithmetic apparatus uses equal vectoring-mode and rotation-mode arithmetic performance, then the system can perform both types of operations, but the arithmetic resources are not effectively used since rotation-mode operations are more frequent in linear algebraic processing

Engineering Contradiction:

Improvearithmetic resource utilization efficiencyVSAvoidcircuit configuration

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The arithmetic unit dynamically switches between vectoring mode and rotation mode based on operational requirements. The calculator can operate in vectoring mode to detect arguments or in rotation mode to perform coordinate rotations, with the mode being selectable according to the specific computational task at hand, thereby optimizing resource utilization for linear algebraic processing where rotation operations predominate

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The arithmetic unit is designed with multi-functionality, capable of performing both vectoring-mode operations (argument detection) and rotation-mode operations (coordinate rotation based on detected arguments). This universal design allows the same hardware resources to serve multiple purposes, improving overall arithmetic resource utilization efficiency while maintaining the capability to handle diverse computational requirements

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Measurement precision

If pipelined CORDIC with 20 or more stages is used for 20 or more bit arithmetic operation, then operation accuracy is improved, but the circuit configuration becomes large and processing delay increases

Engineering Contradiction:

Improveoperation accuracyVSAvoidcircuit configuration scale

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The CORDIC computation is divided into multiple pipeline stages, with each arithmetic unit handling a portion of the overall calculation. This segmentation allows the system to achieve high operation accuracy through sufficient computational stages while managing circuit configuration scale by distributing the computation across modular, cascade-connected units rather than requiring a monolithic large-scale circuit

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The pipeline architecture performs preliminary actions by pre-computing and holding rotational direction information in holding units between stages. This allows subsequent rotation-mode operations to proceed efficiently using pre-determined directional information, reducing the computational burden on individual stages and enabling accurate multi-bit operations without proportionally increasing overall circuit complexity

Inventive Principle:

Principle #10Preliminary action

3Speed

If compact CORDIC with smaller circuit configuration is used, then processing speed and frequency stability are improved, but the number of pipeline stages must be reduced which may affect operation accuracy

Engineering Contradiction:

Improveprocessing frequencyVSAvoidoperation accuracy

Core Design Contradiction:

SpeedVSMeasurement precision

Solution Approach 1:

Holding units store rotational direction information generated during vectoring-mode operations for use in subsequent rotation-mode operations. This preliminary storage of control information allows the compact arithmetic units to perform accurate rotations without requiring additional computational stages, thereby maintaining operation accuracy while enabling faster processing frequencies with reduced circuit configuration

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The holding units act as intermediaries between the vectoring-mode and rotation-mode operations, preserving rotational direction information for later use. This intermediary storage mechanism enables compact arithmetic units to achieve high processing speeds by avoiding redundant computations while maintaining the accuracy required for multi-bit arithmetic operations through efficient reuse of previously computed directional data

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9959094B2Arithmetic apparatus and control method of the same using cordic algorithm

Publication Date: 2018.05.01 CANON KK

AI summary

An arithmetic apparatus comprises a plurality of cascade-connected arithmetic units. Each of the plurality of arithmetic units comprises: a calculator configured to operate in one of a rotation mode of performing a rotation calculation, and a vectoring mode of calculating a rotation angle; and a holding unit configured to hold rotational direction information output from the calculator in the vectoring mode. In addition, when operating in the rotation mode, the calculator performs the rotation calculation on data input from an arithmetic unit in a preceding stage, based on the rotational direction information held in the holding unit.