Processing Unit Task Scheduling With Core Affinity Matching

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Solution Overview

Problem

Existing scheduling methods fail to efficiently allocate tasks to hardware cores that are most effective for their execution, leading to inefficiency and increased power consumption due to unnecessary hardware usage.

Innovation Solution

A scheduling method that assigns affinity codes to tasks, indicating which cores they can be executed on, and allocates cores based on these codes using a bipartite matching algorithm to ensure tasks are executed on optimal hardware, reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If tasks are scheduled using first-come-first-served approach, then scheduling simplicity is maintained, but task execution efficiency deteriorates due to inability to use optimal hardware

Engineering Contradiction:
Improvetask execution efficiencyVSAvoidscheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-assigning affinity codes to tasks before scheduling. Each task is tagged with an affinity code that encodes its hardware preferences in advance. When scheduling occurs, the affinity codes are already prepared and can be quickly matched with available hardware cores, eliminating the need for complex runtime optimization while ensuring efficient task-hardware matching.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If dummy execution is added to ensure tasks execute on specific hardware, then hardware utilization accuracy improves, but hardware computing power is wasted

Engineering Contradiction:
Improvehardware utilization accuracyVSAvoidhardware computing power waste
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements feedback by using affinity codes that provide information about task-hardware compatibility. The scheduling system reads these codes and makes informed decisions about task allocation. This feedback mechanism ensures tasks are directed to suitable hardware without requiring dummy executions, as the affinity code information guides the scheduler to make correct allocations from the start, preventing both reliability issues and energy waste.

Inventive Principle:
Principle #23Feedback

3Productivity

If tasks are allocated to optimal hardware cores, then task execution efficiency improves, but scheduling complexity increases due to need for task-hardware matching

Engineering Contradiction:
Improvetask execution efficiencyVSAvoidscheduling algorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by transforming the scheduling problem into a code-matching problem. Instead of complex algorithms analyzing task characteristics and hardware capabilities, the system uses affinity codes where each bit represents a hardware core. The scheduling complexity is reduced to comparing binary codes and finding matches, which is computationally simple while still achieving optimal task-hardware pairing based on the encoded parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250390353A1Scheduling Method of Processing Unit
Publication Date: 2025.12.25 MEDIATEK INC
  • US20250390353A1 patent drawing
  • US20250390353A1 patent drawing
  • US20250390353A1 patent drawing

AI summary

A scheduling method of a processing unit (PU) includes a plurality of cores. The method includes assigning an affinity code for each one of a plurality of tasks and allocating at least one core of the plurality of cores to at least one task of the plurality of tasks according to a plurality of affinity codes assigned to the plurality of tasks after the plurality of tasks are in a scheduling queue. Each affinity code includes a plurality of bits; each bit of the plurality of bits indicates whether a task is allowed to be executed on a corresponding core of the plurality of cores.