Per-Core Frequency Modulation for Uneven Chip Performance
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Solution Overview
Problem
Existing computing devices face challenges in dynamically modulating chip frequencies to optimize performance due to variations in operational chip and core performance, leading to inefficiencies and reduced overall operational performance.
Innovation Solution
A method and apparatus that automatically adjusts the frequency of each core based on its actual computing performance by using phase locked loops to set and modify frequencies, analyzing performance indicators, and implementing a frequency modulation mechanism to maximize core performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If consistent frequencies are supplied to all operational chips and cores, then device complexity is reduced and ease of operation is improved, but computing performance is not optimized and poor-performance cores negatively impact overall operational performance
Solution Approach 1:
The patent divides the operational chip into multiple performance groups, with each group receiving customized frequency settings. This segmentation allows high-performance cores to operate at higher frequencies while low-performance cores operate at lower frequencies, optimizing overall computing performance without requiring individual core-level complexity.
Solution Approach 2:
The patent applies local quality by providing different frequency characteristics to different regions or groups of cores within the operational chip based on their performance capabilities. This ensures that each core group operates at optimal frequency levels tailored to its specific performance characteristics.
2Productivity
If frequency modulation is implemented for each core based on performance differences, then computing performance is optimized, but device complexity and control difficulty increase
Solution Approach 1:
By segmenting cores into performance groups rather than individually configuring each core, the system maintains ease of operation while achieving performance optimization. The grouping approach simplifies the control mechanism compared to individual core configuration.
Solution Approach 2:
The frequency modulation mechanism serves multiple functions: it optimizes computing performance, adapts to different performance groups, and maintains ease of operation through centralized control. This multi-functionality resolves the contradiction between optimization and operational simplicity.
3Speed
If higher frequencies are supplied to all cores, then computing speed is improved, but power consumption increases and poor-performance cores cannot utilize the higher frequencies effectively
Solution Approach 1:
The patent applies local quality by providing different frequency levels to different performance groups of cores. High-performance cores receive higher frequencies for maximum speed, while low-performance cores receive lower frequencies that match their capabilities, avoiding wasted power consumption and ensuring efficient energy utilization across all cores.
Data Source
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AI summary
The invention provides a chip frequency modulation method and apparatus of a computing device, a hash board, a computing device and a storage medium. The chip frequency modulation method comprises: setting a plurality of working frequencies for the operational chip and causing the plurality of cores to work at the respective working frequencies; analyzing a computing performance indicator of each core at its current working frequency; and modulating the current working frequency of the core up or down according to the computing performance indicator of the core, modulating the frequency of a core with high computing performance up and modulating the frequency of a core with low computing performance down. Therefore, the invention can automatically modulate a frequency corresponding to each core according to the actual computing performance of each core in the operational chip of the computing device, thereby maximizing the computing performance of the cores.