Core Reset I/O Bypass Circuit for Fast Voltage Domain Reset
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional integrated circuits face challenges in coordinating operations across different voltage domains, particularly in resetting core functional components without damaging them, as traditional methods often result in longer reset times and higher power consumption, and are prone to noise issues from external signals.
Innovation Solution
A core reset I/O by-pass component is introduced, which receives a reset indication at a high domain voltage and converts it to a safe level for the core domain, independent of the I/O domain, using a protection circuit with native thick oxide N channel and thin channel transistors, and a noise margin amplification circuit to ensure reliable reset signals with wide noise margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional I/O domain coordination is used for reset operations, then the reset can be communicated through existing circuits, but the reset time increases and power consumption increases
Solution Approach 1:
The patent segments the reset signal path by creating a dedicated bypass component that operates independently from the I/O domain. This allows the core domain to receive reset signals through a separate, optimized path that does not require I/O domain initialization, thereby reducing reset time and enabling faster system startup.
Solution Approach 2:
The bypass component acts as an intermediary element between the reset signal source and the core domain. It receives high-voltage reset indications and converts them to appropriate voltage levels for the core domain, enabling direct reset communication without involving the I/O domain and its associated timing overhead.
2Productivity
If conventional I/O domain coordination is used for reset operations, then the reset can be communicated through existing circuits, but power consumption increases
Solution Approach 1:
By segmenting the reset path into a dedicated bypass component, the patent eliminates the need to power up the entire I/O domain during reset operations. Only the essential bypass component needs to be operational, significantly reducing power consumption while maintaining reset functionality.
Solution Approach 2:
The patent applies partial action by activating only the necessary bypass component for reset operations rather than bringing up the entire I/O domain. This selective activation reduces power consumption to the minimum required level while still achieving the reset function.
3Adaptability or versatility
If external reset signals are used, then the reset indication can be received from outside the integrated circuit, but noise from external signals causes problems for the core domain
Solution Approach 1:
The bypass component serves as an intermediary that isolates the core domain from external noise sources. It receives noisy external reset signals, performs voltage level conversion and signal conditioning, and delivers clean, noise-free reset signals to the core domain, thereby blocking harmful noise interference.
Solution Approach 2:
The patent converts the potentially harmful high-voltage noisy external signals into beneficial clean reset signals through the bypass component's voltage conversion and signal conditioning functionality. The noise present in external signals is filtered and transformed into a reliable reset indication for the core domain.
Data Source
AI summary
Presented systems and methods facilitate efficient reset operation. In one embodiment, a system comprises a core domain portion an I/O domain portion and a core reset I/O by-pass component. The core domain portion is configured to operate at a nominal core domain voltage level. The I/O domain portion configured to operate at a nominal I/O domain voltage level. The core reset I/O by-pass component configured to forward a reset indication to the core domain independent of the I/O domain. In one exemplary implementation the core reset I/O by-pass component is operable to receive an input reset indication at a high domain voltage level and to convert the input reset indication to a core reset signal that is less than or substantially equal to the nominal core domain voltage, wherein the high domain is voltage higher than the core domain voltage level.