Core-Shell Gate Hard Mask Structure for Void-Free FinFET Patterning
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Solution Overview
Problem
The semiconductor industry faces challenges in forming void-free core-shell hard masks during the manufacturing of FinFETs, which can lead to defects and reduced integration density in electronic devices.
Innovation Solution
A method is developed to form a void-free core-shell hard mask over a gate electrode in FinFETs by using a crystallized-core/shell gap fill hard mask, achieved through specific deposition and etching processes that avoid the formation of seams and voids, enhancing the isolation and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition processes are used to form hard masks, then the manufacturing process is simple, but voids and seams form in the hard mask structure
Solution Approach 1:
The hard mask structure is divided into two distinct layers: a crystallized core layer and an amorphous shell layer. This segmentation allows each layer to serve different functions - the core provides structural integrity and void-free formation, while the shell provides etch resistance and pattern definition, thereby achieving high manufacturing precision without requiring complex single-step deposition processes
Solution Approach 2:
The patent employs a composite hard mask structure combining crystallized material (providing void-free formation and structural stability) and amorphous material (providing etch resistance and conformal coverage). This composite approach leverages the complementary advantages of both material states to achieve high-quality hard masks that are free from voids and seams while maintaining manufacturing feasibility
2Productivity
If integration density is increased by reducing feature size, then more components fit in a given area, but defect formation increases
Solution Approach 1:
The crystallized core layer is formed first to establish a void-free foundational structure before the amorphous shell is deposited. This preliminary action ensures that the underlying structure is free from voids and defects, providing a clean base for subsequent shell formation and preventing defect propagation in the final hard mask structure
Solution Approach 2:
The patent utilizes phase transition as a critical parameter change - transforming material from amorphous to crystallized state through controlled heating. This parameter change enables the core layer to achieve a dense, void-free structure with superior mechanical properties, thereby reducing defects while maintaining the scalability needed for high integration density
3Manufacturing precision
If specialized deposition processes are used to avoid voids, then hard mask quality improves, but manufacturing complexity and cost increase
Solution Approach 1:
The crystallized core layer acts as an intermediary structure between the substrate and the final patterned hard mask. It provides a void-free intermediate platform that simplifies subsequent shell deposition and pattern transfer processes, achieving high manufacturing precision through a two-stage approach rather than requiring complex specialized deposition techniques
Solution Approach 2:
The patent exploits the phase transition from amorphous to crystallized state as a natural void-elimination mechanism. By controlling the thermal history of the deposited material, the process automatically densifies the core layer and eliminates voids without requiring complex real-time deposition control, thereby maintaining ease of manufacture while achieving superior hard mask quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved etch resistance and reduced defects, leading to better performance and higher integration density in semiconductor devices without the need for specialized deposition processes.
Implementation Method 1
performing a crystallization process on the first liner layer and the second liner layer
Data Source
AI summary
Structures and methods of forming semiconductor devices are presented in which a void-free core-shell hard mask is formed over a gate electrode. The void-free core-shell hard mask may be formed in some embodiments by forming a first liner layer over the gate electrode, forming a void-free material over the first liner layer, recessing the void-free material, and forming a second liner over the recessed void-free material.