Core-Shell Micro-LED Structure for Light Extraction and Low Defects

The patent transitions from a planar LED structure to a vertical core-shell structure where the active layer wraps around the first semiconductor layer in a three-dimensional configuration. This dimensional change increases the light extraction surface area without increasing the device footprint, thereby maintaining high display resolution while improving light extraction efficiency.

The patent applies different materials and structures to different regions: the first semiconductor layer provides mechanical support and carrier injection, the active layer generates light through electron-hole recombination, and the second semiconductor layer provides additional carrier injection. This local differentiation optimizes each region's function to collectively improve light extraction while maintaining micro-size dimensions.

The active layer is configured as a thin film that wraps around the first semiconductor layer in a shell-like structure. This flexible thin film configuration allows stress distribution across a larger surface area, reducing stress concentration and defect formation in the micro-size LED device while maintaining the small form factor required for high-resolution displays.

By transitioning to a vertical core-shell architecture, the patent distributes mechanical stress across multiple dimensions rather than concentrating it in a planar configuration. The three-dimensional structure provides stress relief pathways that reduce defect density while maintaining the micro-size dimensions necessary for high display resolution.

The patent employs a vertical core-shell growth structure where the active layer wraps around the first semiconductor layer. This three-dimensional configuration can be achieved through sequential epitaxial growth processes, maintaining manufacturing simplicity while dramatically improving light extraction efficiency compared to planar structures.

The LED device is segmented into distinct functional layers: the first semiconductor layer for carrier injection and structural support, the active layer for light generation, and the second semiconductor layer for additional carrier injection. This segmentation allows each layer to be optimized independently while maintaining a manufacturable layered structure.

The active layer is configured to wrap around the first semiconductor layer, covering not only the top surface but also the side surfaces. This three-dimensional coverage increases the light extraction area without significantly complicating the manufacturing process, as it can be achieved through controlled epitaxial growth that naturally forms the wrapping structure.

The active layer is strategically positioned to cover regions where light extraction is most beneficial: the top surface and the side surfaces of the first semiconductor layer. This localized optimization maximizes light extraction efficiency in the regions that contribute most to overall device performance while maintaining manufacturing feasibility.