Core-to-core communication via message router serialization
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Solution Overview
Problem
In cloud computing environments, core-to-core communication using ad hoc techniques faces challenges in coordinating communications and resource management, especially when shared memory resources are involved, leading to inefficiencies such as cache pollution and the need for expensive context switches.
Innovation Solution
The implementation of a core-to-core communication system that uses a message router to serialize writes from source cores to target cores without direct synchronization, avoiding cache pollution and context switches by using dedicated buffers and asynchronous data access, allowing for improved processor resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If ad hoc communication techniques are used between cores, then communication flexibility is improved, but coordination efficiency deteriorates due to difficulties in coordinating communications and resources
Solution Approach 1:
The patent introduces a message router as an intermediary component that mediates communication between source cores and target cores. The message router receives messages from source cores, determines appropriate target cores based on message content, and routes messages accordingly. This intermediary structure maintains communication flexibility while significantly improving coordination efficiency, as the message router centralizes the coordination function and eliminates the need for cores to directly coordinate with each other.
2Productivity
If shared memory resources are used for communication, then resource utilization is improved, but cache pollution occurs leading to performance degradation
Solution Approach 1:
The patent segments the communication path by introducing dedicated communication buffers between source cores and target cores, separating communication traffic from general shared memory access. This segmentation allows communication messages to be transmitted through dedicated buffer structures rather than contaminating the cache with unrelated data accesses, thus maintaining resource utilization while eliminating cache pollution.
Solution Approach 2:
The message router acts as an intermediary that manages communication buffers, receiving messages from source cores and forwarding them to target cores without requiring direct shared memory access between cores. This intermediary structure enables efficient resource utilization through dedicated buffers while preventing cache pollution by isolating communication traffic from the cache hierarchy.
3Speed
If direct core-to-core communication is implemented, then communication speed is improved, but context switches are required increasing system overhead
Solution Approach 1:
The message router serves as an intermediary that enables direct communication between source cores and target cores without requiring context switches to user space or kernel space. The message router handles message routing, buffer management, and target core determination in kernel space, allowing application cores to communicate directly while the message router manages the complexity of context switching and resource coordination.
Solution Approach 2:
The message router implements self-service mechanisms by automatically determining target cores based on message content, managing communication buffers, and handling routing decisions without requiring intervention from application cores. This self-service capability reduces system overhead by eliminating the need for application cores to perform context switches or manage communication state, while maintaining high communication speed through direct core-to-core message passing.
Data Source
AI summary
Apparatus, methods, and computer-readable storage media are disclosed for core-to-core communication between physical and/or virtual processor cores. In some examples of the disclosed technology, application cores write notification data (e.g., to doorbell or PCI configuration memory space accesses via a memory interface), without synchronizing with the other application cores or the service cores. In one examples of the disclosed technology, a message selection circuit is configured to, serialize data from the plurality of user cores by: receiving data from a user core, selecting one of the service cores to send the data based on a memory location addressed by the sending user core, and sending the received data to a respective message buffer dedicated to the selected service core.